ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scan

[karo-tx-uboot.git] / board / amcc / katmai / katmai.c

diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index e078ba4f9cfd6434b1ebe19629985879b52d16e6..aa6d0abddb8a5445614a015368e28ba61455a4b3 100644 (file)
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -32,6 +32,7 @@
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/4xx_pcie.h>
+#include <asm/errno.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -183,46 +184,46 @@ int board_early_init_f (void)
         * Set critical interrupt values.  Set interrupt polarities.  Set interrupt
         * trigger levels.  Make bit 0 High  priority.  Clear all interrupts again.
         *------------------------------------------------------------------------*/
-       mtdcr (uic3sr, 0xffffffff);     /* Clear all interrupts */
-       mtdcr (uic3er, 0x00000000);     /* disable all interrupts */
-       mtdcr (uic3cr, 0x00000000);     /* Set Critical / Non Critical interrupts: */
-       mtdcr (uic3pr, 0xffffffff);     /* Set Interrupt Polarities*/
-       mtdcr (uic3tr, 0x001fffff);     /* Set Interrupt Trigger Levels */
-       mtdcr (uic3vr, 0x00000001);     /* Set Vect base=0,INT31 Highest priority */
-       mtdcr (uic3sr, 0x00000000);     /* clear all  interrupts*/
-       mtdcr (uic3sr, 0xffffffff);     /* clear all  interrupts*/
-
-
-       mtdcr (uic2sr, 0xffffffff);     /* Clear all interrupts */
-       mtdcr (uic2er, 0x00000000);     /* disable all interrupts*/
-       mtdcr (uic2cr, 0x00000000);     /* Set Critical / Non Critical interrupts*/
-       mtdcr (uic2pr, 0xebebebff);     /* Set Interrupt Polarities*/
-       mtdcr (uic2tr, 0x74747400);     /* Set Interrupt Trigger Levels */
-       mtdcr (uic2vr, 0x00000001);     /* Set Vect base=0,INT31 Highest priority */
-       mtdcr (uic2sr, 0x00000000);     /* clear all interrupts */
-       mtdcr (uic2sr, 0xffffffff);     /* clear all interrupts */
-
-       mtdcr (uic1sr, 0xffffffff);     /* Clear all interrupts*/
-       mtdcr (uic1er, 0x00000000);     /* disable all interrupts*/
-       mtdcr (uic1cr, 0x00000000);     /* Set Critical / Non Critical interrupts*/
-       mtdcr (uic1pr, 0xffffffff);     /* Set Interrupt Polarities */
-       mtdcr (uic1tr, 0x001f8040);     /* Set Interrupt Trigger Levels*/
-       mtdcr (uic1vr, 0x00000001);     /* Set Vect base=0,INT31 Highest priority */
-       mtdcr (uic1sr, 0x00000000);     /* clear all interrupts*/
-       mtdcr (uic1sr, 0xffffffff);     /* clear all interrupts*/
-
-       mtdcr (uic0sr, 0xffffffff);     /* Clear all interrupts */
-       mtdcr (uic0er, 0x00000000);     /* disable all interrupts excepted cascade    to be checked */
-       mtdcr (uic0cr, 0x00104001);     /* Set Critical / Non Critical interrupts*/
-       mtdcr (uic0pr, 0xffffffff);     /* Set Interrupt Polarities*/
-       mtdcr (uic0tr, 0x010f0004);     /* Set Interrupt Trigger Levels */
-       mtdcr (uic0vr, 0x00000001);     /* Set Vect base=0,INT31 Highest priority */
-       mtdcr (uic0sr, 0x00000000);     /* clear all interrupts*/
-       mtdcr (uic0sr, 0xffffffff);     /* clear all interrupts*/
-
-       mfsdr(sdr_mfr, mfr);
+       mtdcr (UIC3SR, 0xffffffff);     /* Clear all interrupts */
+       mtdcr (UIC3ER, 0x00000000);     /* disable all interrupts */
+       mtdcr (UIC3CR, 0x00000000);     /* Set Critical / Non Critical interrupts: */
+       mtdcr (UIC3PR, 0xffffffff);     /* Set Interrupt Polarities*/
+       mtdcr (UIC3TR, 0x001fffff);     /* Set Interrupt Trigger Levels */
+       mtdcr (UIC3VR, 0x00000001);     /* Set Vect base=0,INT31 Highest priority */
+       mtdcr (UIC3SR, 0x00000000);     /* clear all  interrupts*/
+       mtdcr (UIC3SR, 0xffffffff);     /* clear all  interrupts*/
+
+
+       mtdcr (UIC2SR, 0xffffffff);     /* Clear all interrupts */
+       mtdcr (UIC2ER, 0x00000000);     /* disable all interrupts*/
+       mtdcr (UIC2CR, 0x00000000);     /* Set Critical / Non Critical interrupts*/
+       mtdcr (UIC2PR, 0xebebebff);     /* Set Interrupt Polarities*/
+       mtdcr (UIC2TR, 0x74747400);     /* Set Interrupt Trigger Levels */
+       mtdcr (UIC2VR, 0x00000001);     /* Set Vect base=0,INT31 Highest priority */
+       mtdcr (UIC2SR, 0x00000000);     /* clear all interrupts */
+       mtdcr (UIC2SR, 0xffffffff);     /* clear all interrupts */
+
+       mtdcr (UIC1SR, 0xffffffff);     /* Clear all interrupts*/
+       mtdcr (UIC1ER, 0x00000000);     /* disable all interrupts*/
+       mtdcr (UIC1CR, 0x00000000);     /* Set Critical / Non Critical interrupts*/
+       mtdcr (UIC1PR, 0xffffffff);     /* Set Interrupt Polarities */
+       mtdcr (UIC1TR, 0x001f8040);     /* Set Interrupt Trigger Levels*/
+       mtdcr (UIC1VR, 0x00000001);     /* Set Vect base=0,INT31 Highest priority */
+       mtdcr (UIC1SR, 0x00000000);     /* clear all interrupts*/
+       mtdcr (UIC1SR, 0xffffffff);     /* clear all interrupts*/
+
+       mtdcr (UIC0SR, 0xffffffff);     /* Clear all interrupts */
+       mtdcr (UIC0ER, 0x00000000);     /* disable all interrupts excepted cascade    to be checked */
+       mtdcr (UIC0CR, 0x00104001);     /* Set Critical / Non Critical interrupts*/
+       mtdcr (UIC0PR, 0xffffffff);     /* Set Interrupt Polarities*/
+       mtdcr (UIC0TR, 0x010f0004);     /* Set Interrupt Trigger Levels */
+       mtdcr (UIC0VR, 0x00000001);     /* Set Vect base=0,INT31 Highest priority */
+       mtdcr (UIC0SR, 0x00000000);     /* clear all interrupts*/
+       mtdcr (UIC0SR, 0xffffffff);     /* clear all interrupts*/
+
+       mfsdr(SDR0_MFR, mfr);
        mfr |= SDR0_MFR_FIXD;           /* Workaround for PCI/DMA */
-       mtsdr(sdr_mfr, mfr);
+       mtsdr(SDR0_MFR, mfr);
 
        mtsdr(SDR0_PFC0, CONFIG_SYS_PFC0);
 
@@ -280,7 +281,7 @@ int pci_pre_init(struct pci_controller * hose )
         *      The katmai board is always configured as the host & requires the
         *      PCI arbiter to be enabled.
         *-------------------------------------------------------------------*/
-       mfsdr(sdr_sdstp1, strap);
+       mfsdr(SDR0_SDSTP1, strap);
        if( (strap & SDR0_SDSTP1_PAE_MASK) == 0 ) {
                printf("PCI: SDR0_STRP1[%08lX] - PCI Arbiter disabled.\n",strap);
                return 0;
@@ -391,6 +392,8 @@ void pcie_setup_hoses(int busno)
                        ret = ppc4xx_init_pcie_endport(i);
                else
                        ret = ppc4xx_init_pcie_rootport(i);
+               if (ret == -ENODEV)
+                       continue;
                if (ret) {
                        printf("PCIE%d: initialization as %s failed\n", i,
                               is_end_point(i) ? "endpoint" : "root-complex");