]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - board/atmel/at91sam9n12ek/at91sam9n12ek.c
nand: Embed mtd_info in struct nand_chip
[karo-tx-uboot.git] / board / atmel / at91sam9n12ek / at91sam9n12ek.c
index 4f46a0353338be729a01b6d2d71994449bf0214c..fc4f50d2192acabb33206a31a58d2bd2dce900d2 100644 (file)
@@ -10,7 +10,6 @@
 #include <asm/arch/at91sam9x5_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
-#include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_rstc.h>
 #include <asm/arch/at91_pio.h>
 #include <asm/arch/clk.h>
@@ -125,7 +124,7 @@ void lcd_show_board_info(void)
                dram_size += gd->bd->bi_dram[i].size;
        nand_size = 0;
        for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
-               nand_size += nand_info[i].size;
+               nand_size += nand_info[i]->size;
        lcd_printf("  %ld MB SDRAM, %ld MB NAND\n",
                dram_size >> 20,
                nand_size >> 20);
@@ -208,9 +207,8 @@ void at91sam9n12ek_usb_hw_init(void)
 
 int board_early_init_f(void)
 {
-       /* Enable clocks for all PIOs */
-       struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
-       writel((1 << ATMEL_ID_PIOAB) | (1 << ATMEL_ID_PIOCD), &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_PIOAB);
+       at91_periph_clk_enable(ATMEL_ID_PIOCD);
 
        at91_seriald_hw_init();
        return 0;
@@ -274,7 +272,7 @@ void at91_spl_board_init(void)
 }
 
 #include <asm/arch/atmel_mpddrc.h>
-static void ddr2_conf(struct atmel_mpddr *ddr2)
+static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
 {
        ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
 
@@ -310,13 +308,13 @@ void mem_init(void)
 {
        struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
        struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
-       struct atmel_mpddr ddr2;
+       struct atmel_mpddrc_config ddr2;
        unsigned long csa;
 
        ddr2_conf(&ddr2);
 
        /* enable DDR2 clock */
-       writel(0x4, &pmc->scer);
+       writel(AT91_PMC_DDR, &pmc->scer);
 
        /* Chip select 1 is for DDR2/SDRAM */
        csa = readl(&matrix->ebicsa);
@@ -327,6 +325,6 @@ void mem_init(void)
        writel(csa, &matrix->ebicsa);
 
        /* DDRAM2 Controller initialize */
-       ddr2_init(ATMEL_BASE_CS1, &ddr2);
+       ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2);
 }
 #endif