struct memac_mdio_info tg_memac_mdio_info;
unsigned int i;
unsigned int serdes1_prtcl, serdes2_prtcl;
+ int qsgmii;
+ struct mii_dev *bus;
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
serdes1_prtcl = in_be32(&gur->rcwsr[4]) &
FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
break;
}
+ /*set PHY address for QSGMII Riser Card on slot2*/
+ bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
+ qsgmii = is_qsgmii_riser_card(bus, PHY_BASE_ADDR, PORT_NUM, REGNUM);
+
+ if (qsgmii) {
+ switch (serdes2_prtcl) {
+ case 0xb2:
+ case 0x8d:
+ fm_info_set_phy_address(FM1_DTSEC3, PHY_BASE_ADDR);
+ fm_info_set_phy_address(FM1_DTSEC4, PHY_BASE_ADDR + 1);
+ break;
+ default:
+ break;
+ }
+ }
+
for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
int idx = i - FM1_DTSEC1;