nxp: ls102xa: add LS1 PSCI system suspend

[karo-tx-uboot.git] / board / freescale / common / arm_sleep.c

diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c
index c06b86291a3958cabbfcee83f27b58be9f058811..16fd445306ec90d396e55ebd239d15ca365361ab 100644 (file)
--- a/board/freescale/common/arm_sleep.c
+++ b/board/freescale/common/arm_sleep.c
@@ -6,13 +6,12 @@
 
 #include <common.h>
 #include <asm/io.h>
-#if !defined(CONFIG_ARMV7_NONSEC) || !defined(CONFIG_ARMV7_VIRT)
+#ifndef CONFIG_ARMV7_NONSEC
 #error " Deep sleep needs non-secure mode support. "
 #else
 #include <asm/secure.h>
 #endif
 #include <asm/armv7.h>
-#include <asm/cache.h>
 
 #if defined(CONFIG_LS102XA)
 #include <asm/arch/immap_ls102xa.h>
@@ -20,7 +19,7 @@
 
 #include "sleep.h"
 #ifdef CONFIG_U_QE
-#include "../../../drivers/qe/qe.h"
+#include <fsl_qe.h>
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -65,19 +64,49 @@ static void dp_ddr_restore(void)
 
        for (i = 0; i < DDR_BUFF_LEN / 8; i++)
                *dst++ = *src++;
+}
+
+#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA)
+void ls1_psci_resume_fixup(void)
+{
+       u32 tmp;
+       struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
+
+#ifdef QIXIS_BASE
+       void *qixis_base = (void *)QIXIS_BASE;
+
+       /* Pull on PCIe RST# */
+       out_8(qixis_base + QIXIS_RST_FORCE_3, 0);
 
-       flush_dcache_all();
+       /* disable deep sleep signals in FPGA */
+       tmp = in_8(qixis_base + QIXIS_PWR_CTL2);
+       tmp &= ~QIXIS_PWR_CTL2_PCTL;
+       out_8(qixis_base + QIXIS_PWR_CTL2, tmp);
+#endif
+
+       /* Disable wakeup interrupt during deep sleep */
+       out_be32(&scfg->pmcintecr, 0);
+       /* Clear PMC interrupt status */
+       out_be32(&scfg->pmcintsr, 0xffffffff);
+
+       /* Disable Warm Device Reset */
+       tmp = in_be32(&scfg->dpslpcr);
+       tmp &= ~SCFG_DPSLPCR_WDRR_EN;
+       out_be32(&scfg->dpslpcr, tmp);
 }
+#endif
 
 static void dp_resume_prepare(void)
 {
        dp_ddr_restore();
        board_sleep_prepare();
        armv7_init_nonsec();
-       cleanup_before_linux();
 #ifdef CONFIG_U_QE
        u_qe_resume();
 #endif
+#if defined(CONFIG_ARMV7_PSCI) && defined(CONFIG_LS102XA)
+       ls1_psci_resume_fixup();
+#endif
 }
 
 int fsl_dp_resume(void)
@@ -92,7 +121,7 @@ int fsl_dp_resume(void)
        dp_resume_prepare();
 
        /* Get the entry address and jump to kernel */
-       start_addr = in_le32(&scfg->sparecr[1]);
+       start_addr = in_le32(&scfg->sparecr[3]);
        debug("Entry address is 0x%08x\n", start_addr);
        kernel_resume = (void (*)(void))start_addr;
        secure_ram_addr(_do_nonsec_entry)(kernel_resume, 0, 0, 0);