powerpc/mpc8xxx: Merge entries in DDR speed table

[karo-tx-uboot.git] / board / freescale / p2041rdb / ddr.c

diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c
index 36370933b4d54c27d51a217a25ed8627a41cdcf9..6d9a5de1c51f569d46533fa13279e9ae0e56b9e6 100644 (file)
--- a/board/freescale/p2041rdb/ddr.c
+++ b/board/freescale/p2041rdb/ddr.c
@@ -14,69 +14,91 @@
 #include <asm/fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 
-typedef struct {
-       u32 datarate_mhz_low;
-       u32 datarate_mhz_high;
+struct board_specific_parameters {
        u32 n_ranks;
+       u32 datarate_mhz_high;
        u32 clk_adjust;
        u32 wrlvl_start;
        u32 cpo;
        u32 write_data_delay;
        u32 force_2T;
-} board_specific_parameters_t;
+};
 
 /*
+ * This table contains all valid speeds we want to override with board
+ * specific parameters. datarate_mhz_high values need to be in ascending order
+ * for each n_ranks group.
+ *
  * ranges for parameters:
  *  wr_data_delay = 0-6
  *  clk adjust = 0-8
  *  cpo 2-0x1E (30)
  */
-const board_specific_parameters_t board_specific_parameters[] = {
+static const struct board_specific_parameters dimm0[] = {
        /*
         * memory controller 0
-        *  lo|  hi|  num|  clk| wrlvl | cpo  |wrdata|2T
-        * mhz| mhz|ranks|adjst| start | delay|
+        *   num|  hi|  clk| wrlvl | cpo  |wrdata|2T
+        * ranks| mhz|adjst| start | delay|
         */
-       {    0,  750,    2,    3,     5,   0xff,    2,  0},
-       {  751, 1250,    2,    4,     6,   0xff,    2,  0},
-       { 1251, 1350,    2,    5,     7,   0xff,    2,  0},
-       { 1351, 1666,    2,    5,     8,   0xff,    2,  0},
+       {2,   750,    3,     5,   0xff,    2,  0},
+       {2,  1250,    4,     6,   0xff,    2,  0},
+       {2,  1350,    5,     7,   0xff,    2,  0},
+       {2,  1666,    5,     8,   0xff,    2,  0},
+       {}
 };
 
 void fsl_ddr_board_options(memctl_options_t *popts,
                                dimm_params_t *pdimm,
                                unsigned int ctrl_num)
 {
-       const board_specific_parameters_t *pbsp =
-                               &board_specific_parameters[0];
-       u32 num_params = ARRAY_SIZE(board_specific_parameters);
-       u32 i;
+       const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
        ulong ddr_freq;
 
+       if (ctrl_num) {
+               printf("Wrong parameter for controller number %d", ctrl_num);
+               return;
+       }
+       if (!pdimm->n_ranks)
+               return;
+
+       pbsp = dimm0;
+
        /*
         * Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr
         * freqency and n_banks specified in board_specific_parameters table.
         */
        ddr_freq = get_ddr_freq(0) / 1000000;
-       for (i = 0; i < num_params; i++) {
-               if (ddr_freq >= pbsp->datarate_mhz_low &&
-                       ddr_freq <= pbsp->datarate_mhz_high &&
-                       pdimm[0].n_ranks == pbsp->n_ranks) {
-                       popts->cpo_override = pbsp->cpo;
-                       popts->write_data_delay = pbsp->write_data_delay;
-                       popts->clk_adjust = pbsp->clk_adjust;
-                       popts->wrlvl_start = pbsp->wrlvl_start;
-                       popts->twoT_en = pbsp->force_2T;
-                       break;
+       while (pbsp->datarate_mhz_high) {
+               if (pbsp->n_ranks == pdimm->n_ranks) {
+                       if (ddr_freq <= pbsp->datarate_mhz_high) {
+                               popts->cpo_override = pbsp->cpo;
+                               popts->write_data_delay =
+                                       pbsp->write_data_delay;
+                               popts->clk_adjust = pbsp->clk_adjust;
+                               popts->wrlvl_start = pbsp->wrlvl_start;
+                               popts->twoT_en = pbsp->force_2T;
+                               goto found;
+                       }
+                       pbsp_highest = pbsp;
                }
                pbsp++;
        }
 
-       if (i == num_params) {
-               printf("Warning: board specific timing not found "
-                       "for data rate %lu MT/s!\n", ddr_freq);
+       if (pbsp_highest) {
+               printf("Error: board specific timing not found "
+                       "for data rate %lu MT/s!\n"
+                       "Trying to use the highest speed (%u) parameters\n",
+                       ddr_freq, pbsp_highest->datarate_mhz_high);
+               popts->cpo_override = pbsp_highest->cpo;
+               popts->write_data_delay = pbsp_highest->write_data_delay;
+               popts->clk_adjust = pbsp_highest->clk_adjust;
+               popts->wrlvl_start = pbsp_highest->wrlvl_start;
+               popts->twoT_en = pbsp_highest->force_2T;
+       } else {
+               panic("DIMM is not supported by this board");
        }
 
+found:
        /*
         * Factors to consider for half-strength driver enable:
         *      - number of DIMMs installed