powerpc/p2041: configure the CPLD lane_mux according to RCW

[karo-tx-uboot.git] / board / freescale / p2041rdb / eth.c

diff --git a/board/freescale/p2041rdb/eth.c b/board/freescale/p2041rdb/eth.c
index 0a1dfa7cc656e4b2c6d945c78e266e8afee15469..fec97773eab9323667e84d416323ed3e39aed573 100644 (file)
--- a/board/freescale/p2041rdb/eth.c
+++ b/board/freescale/p2041rdb/eth.c
@@ -136,26 +136,27 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
 }
 #endif /* #ifdef CONFIG_FMAN_ENET */
 
+#define CPLD_LANE_A_SEL        0x1
+#define CPLD_LANE_G_SEL        0x2
+#define CPLD_LANE_C_SEL        0x4
+#define CPLD_LANE_D_SEL        0x8
+
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FMAN_ENET
-       struct dtsec *tsec = (void *)CONFIG_SYS_FSL_FM1_DTSEC1_ADDR;
        struct fsl_pq_mdio_info dtsec_mdio_info;
        struct tgec_mdio_info tgec_mdio_info;
        unsigned int i, slot;
        int lane;
+       ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+       int srds_prtcl = (in_be32(&gur->rcwsr[4]) &
+                               FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26;
+       u8 mux = CPLD_READ(serdes_mux);
 
        printf("Initializing Fman\n");
 
        initialize_lane_to_slot();
 
-       /*
-        * Set TBIPA on FM1@DTSEC1.  This is needed for configurations
-        * where FM1@DTSEC1 isn't used directly, since it provides
-        * MDIO for other ports.
-        */
-       out_be32(&tsec->tbipa, CONFIG_SYS_TBIPA_VALUE);
-
        dtsec_mdio_info.regs =
                (struct tsec_mii_mng *)CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR;
        dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
@@ -180,6 +181,36 @@ int board_eth_init(bd_t *bis)
        fm_info_set_phy_address(FM1_DTSEC2, CONFIG_SYS_FM1_DTSEC2_PHY_ADDR);
        fm_info_set_phy_address(FM1_DTSEC3, CONFIG_SYS_FM1_DTSEC3_PHY_ADDR);
 
+       mux &= ~(CPLD_LANE_A_SEL | CPLD_LANE_C_SEL | CPLD_LANE_D_SEL);
+       switch (srds_prtcl) {
+       case 0x2:
+       case 0xf:
+               mux &= ~CPLD_LANE_G_SEL;
+               break;
+       case 0x5:
+       case 0x9:
+       case 0xa:
+       case 0x17:
+               mux |= CPLD_LANE_G_SEL;
+               break;
+       case 0x14:
+               mux = (mux & (~CPLD_LANE_G_SEL)) | CPLD_LANE_A_SEL;
+               break;
+       case 0x8:
+       case 0x16:
+       case 0x19:
+       case 0x1a:
+               mux |= CPLD_LANE_G_SEL | CPLD_LANE_C_SEL | CPLD_LANE_D_SEL;
+               break;
+       case 0x1c:
+               mux |= CPLD_LANE_G_SEL | CPLD_LANE_A_SEL;
+               break;
+       default:
+               printf("Fman:Unsupported SerDes Protocol 0x%02x\n", srds_prtcl);
+               break;
+       }
+       CPLD_WRITE(serdes_mux, mux);
+
        for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
                int idx = i - FM1_DTSEC1;