kconfig: add board Kconfig and defconfig files

[karo-tx-uboot.git] / board / gdsys / 405ep / 405ep.c

diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c
index f0df2e39e6a9159c5a2641d66cd40ccc9dc2cd66..426dc05c7d3cea53fda73193e25a3a2e40007aa2 100644 (file)
--- a/board/gdsys/405ep/405ep.c
+++ b/board/gdsys/405ep/405ep.c
@@ -18,6 +18,12 @@
 #define REFLECTION_TESTPATTERN 0xdede
 #define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN & 0xffff)
 
+#ifdef CONFIG_SYS_FPGA_NO_RFL_HI
+#define REFLECTION_TESTREG reflection_low
+#else
+#define REFLECTION_TESTREG reflection_high
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 int get_fpga_state(unsigned dev)
@@ -90,23 +96,17 @@ int board_early_init_r(void)
        gd405ep_set_fpga_reset(0);
 
        for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
-               struct ihs_fpga *fpga =
-                       (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k);
-#ifdef CONFIG_SYS_FPGA_NO_RFL_HI
-               u16 *reflection_target = &fpga->reflection_low;
-#else
-               u16 *reflection_target = &fpga->reflection_high;
-#endif
                /*
                 * wait for fpga out of reset
                 */
                ctr = 0;
                while (1) {
-                       out_le16(&fpga->reflection_low,
-                               REFLECTION_TESTPATTERN);
+                       u16 val;
+
+                       FPGA_SET_REG(k, reflection_low, REFLECTION_TESTPATTERN);
 
-                       if (in_le16(reflection_target) ==
-                               REFLECTION_TESTPATTERN_INV)
+                       FPGA_GET_REG(k, REFLECTION_TESTREG, &val);
+                       if (val == REFLECTION_TESTPATTERN_INV)
                                break;
 
                        udelay(100000);