ppc4xx: Add Io64 board support

[karo-tx-uboot.git] / board / gdsys / common / miiphybb.c

diff --git a/board/gdsys/common/miiphybb.c b/board/gdsys/common/miiphybb.c
index e56e966509cd62d2a17dc4fffd863bfd91e80efb..46f1a1ecbb4f706b7c604a10c82f260b08cb208f 100644 (file)
--- a/board/gdsys/common/miiphybb.c
+++ b/board/gdsys/common/miiphybb.c
@@ -26,6 +26,11 @@
 
 #include <asm/io.h>
 
+struct io_bb_pinset {
+       int mdio;
+       int mdc;
+};
+
 static int io_bb_mii_init(struct bb_miiphy_bus *bus)
 {
        return 0;
@@ -33,47 +38,57 @@ static int io_bb_mii_init(struct bb_miiphy_bus *bus)
 
 static int io_bb_mdio_active(struct bb_miiphy_bus *bus)
 {
+       struct io_bb_pinset *pins = bus->priv;
+
        out_be32((void *)GPIO0_TCR,
-               in_be32((void *)GPIO0_TCR) | CONFIG_SYS_MDIO_PIN);
+               in_be32((void *)GPIO0_TCR) | pins->mdio);
 
        return 0;
 }
 
 static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus)
 {
+       struct io_bb_pinset *pins = bus->priv;
+
        out_be32((void *)GPIO0_TCR,
-               in_be32((void *)GPIO0_TCR) & ~CONFIG_SYS_MDIO_PIN);
+               in_be32((void *)GPIO0_TCR) & ~pins->mdio);
 
        return 0;
 }
 
 static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v)
 {
+       struct io_bb_pinset *pins = bus->priv;
+
        if (v)
                out_be32((void *)GPIO0_OR,
-                       in_be32((void *)GPIO0_OR) | CONFIG_SYS_MDIO_PIN);
+                       in_be32((void *)GPIO0_OR) | pins->mdio);
        else
                out_be32((void *)GPIO0_OR,
-                       in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_MDIO_PIN);
+                       in_be32((void *)GPIO0_OR) & ~pins->mdio);
 
        return 0;
 }
 
 static int io_bb_get_mdio(struct bb_miiphy_bus *bus, int *v)
 {
-       *v = ((in_be32((void *)GPIO0_IR) & CONFIG_SYS_MDIO_PIN) != 0);
+       struct io_bb_pinset *pins = bus->priv;
+
+       *v = ((in_be32((void *)GPIO0_IR) & pins->mdio) != 0);
 
        return 0;
 }
 
 static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v)
 {
+       struct io_bb_pinset *pins = bus->priv;
+
        if (v)
                out_be32((void *)GPIO0_OR,
-                       in_be32((void *)GPIO0_OR) | CONFIG_SYS_MDC_PIN);
+                       in_be32((void *)GPIO0_OR) | pins->mdc);
        else
                out_be32((void *)GPIO0_OR,
-                       in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_MDC_PIN);
+                       in_be32((void *)GPIO0_OR) & ~pins->mdc);
 
        return 0;
 }
@@ -85,6 +100,19 @@ static int io_bb_delay(struct bb_miiphy_bus *bus)
        return 0;
 }
 
+struct io_bb_pinset io_bb_pinsets[] = {
+       {
+               .mdio = CONFIG_SYS_MDIO_PIN,
+               .mdc = CONFIG_SYS_MDC_PIN,
+       },
+#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
+       {
+               .mdio = CONFIG_SYS_MDIO1_PIN,
+               .mdc = CONFIG_SYS_MDC1_PIN,
+       },
+#endif
+};
+
 struct bb_miiphy_bus bb_miiphy_buses[] = {
        {
                .name = CONFIG_SYS_GBIT_MII_BUSNAME,
@@ -95,7 +123,21 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
                .get_mdio = io_bb_get_mdio,
                .set_mdc = io_bb_set_mdc,
                .delay = io_bb_delay,
-       }
+               .priv = &io_bb_pinsets[0],
+       },
+#ifdef CONFIG_SYS_GBIT_MII1_BUSNAME
+       {
+               .name = CONFIG_SYS_GBIT_MII1_BUSNAME,
+               .init = io_bb_mii_init,
+               .mdio_active = io_bb_mdio_active,
+               .mdio_tristate = io_bb_mdio_tristate,
+               .set_mdio = io_bb_set_mdio,
+               .get_mdio = io_bb_get_mdio,
+               .set_mdc = io_bb_set_mdc,
+               .delay = io_bb_delay,
+               .priv = &io_bb_pinsets[1],
+       },
+#endif
 };
 
 int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /