Remove obsolete mpc5xxx linker scripts (3 of 3)

[karo-tx-uboot.git] / board / inka4x0 / inka4x0.c

diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c
index 72293ecf7eb202b88476c6fd372a03f0d4854c8e..d670cc35a003e0790ae566eb7e3fc0ede7faf76f 100644 (file)
--- a/board/inka4x0/inka4x0.c
+++ b/board/inka4x0/inka4x0.c
@@ -43,13 +43,11 @@ static void sdram_start (int hi_addr)
        long hi_addr_bit = hi_addr ? 0x01000000 : 0;
 
        /* unlock mode register */
-       *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 |
-               hi_addr_bit;
+       *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
        __asm__ volatile ("sync");
 
        /* precharge all banks */
-       *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
-               hi_addr_bit;
+       *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
        __asm__ volatile ("sync");
 
 #if SDRAM_DDR
@@ -63,13 +61,11 @@ static void sdram_start (int hi_addr)
 #endif
 
        /* precharge all banks */
-       *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 |
-               hi_addr_bit;
+       *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
        __asm__ volatile ("sync");
 
        /* auto refresh */
-       *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 |
-               hi_addr_bit;
+       *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
        __asm__ volatile ("sync");
 
        /* set mode register */
@@ -176,3 +172,93 @@ void flash_preinit(void)
         */
        *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 }
+
+int misc_init_f (void)
+{
+       uchar tmp[10];
+       int i, br;
+
+       i = getenv_r("brightness", tmp, sizeof(tmp));
+       br = (i > 0)
+               ? (int) simple_strtoul (tmp, NULL, 10)
+               : CFG_BRIGHTNESS;
+       if (br > 255)
+               br = 255;
+
+       /* Initialize GPIO output pins.
+        */
+       /* Configure GPT as GPIO output (and set them as they control low-active LEDs */
+       *(vu_long *)MPC5XXX_GPT0_ENABLE =
+       *(vu_long *)MPC5XXX_GPT1_ENABLE =
+       *(vu_long *)MPC5XXX_GPT2_ENABLE =
+       *(vu_long *)MPC5XXX_GPT3_ENABLE =
+       *(vu_long *)MPC5XXX_GPT4_ENABLE =
+       *(vu_long *)MPC5XXX_GPT5_ENABLE = 0x34;
+
+       /* Configure GPT7 as PWM timer, 1kHz, no ints. */
+       *(vu_long *)MPC5XXX_GPT7_ENABLE = 0;/* Disable */
+       *(vu_long *)MPC5XXX_GPT7_COUNTER = 0x020000fe;
+       *(vu_long *)MPC5XXX_GPT7_PWMCFG = (br << 16);
+       *(vu_long *)MPC5XXX_GPT7_ENABLE = 0x3;/* Enable PWM mode and start */
+
+       /* Configure PSC3_6,7 as GPIO output */
+       *(vu_long *)MPC5XXX_GPIO_ENABLE |= 0x00003000;
+       *(vu_long *)MPC5XXX_GPIO_DIR |= 0x00003000;
+
+       /* Configure PSC3_8 as GPIO output, no interrupt */
+       *(vu_long *)MPC5XXX_GPIO_SI_ENABLE |= 0x04000000;
+       *(vu_long *)MPC5XXX_GPIO_SI_DIR |= 0x04000000;
+       *(vu_long *)MPC5XXX_GPIO_SI_IEN &= ~0x04000000;
+
+       /* Configure PSC3_9 and GPIO_WKUP6,7 as GPIO output */
+       *(vu_long *)MPC5XXX_WU_GPIO_ENABLE |= 0xc4000000;
+       *(vu_long *)MPC5XXX_WU_GPIO_DIR |= 0xc4000000;
+
+       /* Set LR mirror bit because it is low-active */
+       *(vu_long *) MPC5XXX_WU_GPIO_DATA_O    |= GPIO_WKUP_7;
+       /*
+        * Reset Coral-P graphics controller
+        */
+       *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC3_9;
+       *(vu_long *) MPC5XXX_WU_GPIO_DIR    |= GPIO_PSC3_9;
+       *(vu_long *) MPC5XXX_WU_GPIO_DATA_O   |= GPIO_PSC3_9;
+       return 0;
+}
+
+#ifdef CONFIG_PCI
+static struct pci_controller hose;
+
+extern void pci_mpc5xxx_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+       pci_mpc5xxx_init(&hose);
+}
+#endif
+
+#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+
+void init_ide_reset (void)
+{
+       debug ("init_ide_reset\n");
+
+       /* Configure PSC1_4 as GPIO output for ATA reset */
+       *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
+       *(vu_long *) MPC5XXX_WU_GPIO_DIR    |= GPIO_PSC1_4;
+       /* Deassert reset */
+       *(vu_long *) MPC5XXX_WU_GPIO_DATA_O   |= GPIO_PSC1_4;
+}
+
+void ide_set_reset (int idereset)
+{
+       debug ("ide_reset(%d)\n", idereset);
+
+       if (idereset) {
+               *(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
+               /* Make a delay. MPC5200 spec says 25 usec min */
+               udelay(500000);
+       } else {
+               *(vu_long *) MPC5XXX_WU_GPIO_DATA_O |=  GPIO_PSC1_4;
+       }
+}
+#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */