/*
* (C) Copyright 2000-2004
+ * Pantelis Antoniou, Intracom S.A., panto@intracom.gr
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
#include <common.h>
#include <miiphy.h>
#include <sed156x.h>
+#include <status_led.h>
#include "mpc8xx.h"
#include <watchdog.h>
#endif
+int fec8xx_miiphy_read(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value);
+int fec8xx_miiphy_write(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value);
+
/****************************************************************/
/* some sane bit macros */
int checkboard(void)
{
- printf ("Intracom NetPhone\n");
+ printf ("Intracom NetPhone V%d\n", CONFIG_NETPHONE_VERSION);
return (0);
}
#define BS_1110 0x0E000000
#define BS_1111 0x0F000000
-#define A10_AAAA 0x00000000
-#define A10_AAA0 0x00200000
-#define A10_AAA1 0x00300000
-#define A10_000A 0x00800000
-#define A10_0000 0x00A00000
-#define A10_0001 0x00B00000
-#define A10_111A 0x00C00000
-#define A10_1110 0x00E00000
-#define A10_1111 0x00F00000
-
-#define RAS_0000 0x00000000
-#define RAS_0001 0x00040000
-#define RAS_1110 0x00080000
-#define RAS_1111 0x000C0000
-
-#define CAS_0000 0x00000000
-#define CAS_0001 0x00010000
-#define CAS_1110 0x00020000
-#define CAS_1111 0x00030000
-
-#define WE_0000 0x00000000
-#define WE_0001 0x00004000
-#define WE_1110 0x00008000
-#define WE_1111 0x0000C000
+#define GPL0_AAAA 0x00000000
+#define GPL0_AAA0 0x00200000
+#define GPL0_AAA1 0x00300000
+#define GPL0_000A 0x00800000
+#define GPL0_0000 0x00A00000
+#define GPL0_0001 0x00B00000
+#define GPL0_111A 0x00C00000
+#define GPL0_1110 0x00E00000
+#define GPL0_1111 0x00F00000
+
+#define GPL1_0000 0x00000000
+#define GPL1_0001 0x00040000
+#define GPL1_1110 0x00080000
+#define GPL1_1111 0x000C0000
+
+#define GPL2_0000 0x00000000
+#define GPL2_0001 0x00010000
+#define GPL2_1110 0x00020000
+#define GPL2_1111 0x00030000
+
+#define GPL3_0000 0x00000000
+#define GPL3_0001 0x00004000
+#define GPL3_1110 0x00008000
+#define GPL3_1111 0x0000C000
#define GPL4_0000 0x00000000
#define GPL4_0001 0x00001000
#define LAST 0x00000001
+#define A10_AAAA GPL0_AAAA
+#define A10_AAA0 GPL0_AAA0
+#define A10_AAA1 GPL0_AAA1
+#define A10_000A GPL0_000A
+#define A10_0000 GPL0_0000
+#define A10_0001 GPL0_0001
+#define A10_111A GPL0_111A
+#define A10_1110 GPL0_1110
+#define A10_1111 GPL0_1111
+
+#define RAS_0000 GPL1_0000
+#define RAS_0001 GPL1_0001
+#define RAS_1110 GPL1_1110
+#define RAS_1111 GPL1_1111
+
+#define CAS_0000 GPL2_0000
+#define CAS_0001 GPL2_0001
+#define CAS_1110 GPL2_1110
+#define CAS_1111 GPL2_1111
+
+#define WE_0000 GPL3_0000
+#define WE_0001 GPL3_0001
+#define WE_1110 GPL3_1110
+#define WE_1111 GPL3_1111
+
/* #define CAS_LATENCY 3 */
#define CAS_LATENCY 2
CS_0001 | BS_1111 | A10_0001 | RAS_0001 | CAS_0001 | WE_0001 | AMX_MAR | UTA | LAST,
};
+#if CONFIG_NETPHONE_VERSION == 2
+static const uint nandcs_table[0x40] = {
+ /* RSS */
+ CS_1000 | GPL4_1111 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_1110 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_0000 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_0000 | GPL5_1111,
+ CS_0000 | GPL4_0001 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
+ CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST, /* NOP */
+
+ /* RBS */
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+ /* WSS */
+ CS_1000 | GPL4_1111 | GPL5_1110 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_0000 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_0001 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_1111 | UTA,
+ CS_0000 | GPL4_1111 | GPL5_1111,
+ CS_0011 | GPL4_1111 | GPL5_1111 | UTA | LAST,
+
+ /* WBS */
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+ /* UPT */
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_,
+
+ /* EXC */
+ CS_0001 | LAST,
+ _NOT_USED_,
+
+ /* REG */
+ CS_1110 ,
+ CS_0001 | LAST,
+};
+#endif
+
/* 0xC8 = 0b11001000 , CAS3, >> 2 = 0b00 11 0 010 */
/* 0x88 = 0b10001000 , CAS2, >> 2 = 0b00 10 0 010 */
#define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU)
/* 8 */
-#define CFG_MAMR ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+#define CONFIG_SYS_MAMR ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
}
}
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size;
- upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(uint));
+ upmconfig(UPMB, (uint *) sdram_table, sizeof(sdram_table) / sizeof(sdram_table[0]));
/*
* Preliminary prescaler for refresh
/*
* Map controller bank 3 to the SDRAM bank at preliminary address.
*/
- memctl->memc_or3 = CFG_OR3_PRELIM;
- memctl->memc_br3 = CFG_BR3_PRELIM;
+ memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM;
+ memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM;
- memctl->memc_mbmr = CFG_MAMR & ~MAMR_PTAE; /* no refresh yet */
+ memctl->memc_mbmr = CONFIG_SYS_MAMR & ~MAMR_PTAE; /* no refresh yet */
udelay(200);
size = get_ram_size((long *)0, SDRAM_MAX_SIZE);
-#if 0
- printf("check 0\n");
- check_ram(( 0 << 20), (2 << 20));
- printf("check 16\n");
- check_ram((16 << 20), (2 << 20));
- printf("check 32\n");
- check_ram((32 << 20), (2 << 20));
- printf("check 48\n");
- check_ram((48 << 20), (2 << 20));
-#endif
-
if (size == 0) {
printf("SIZE is zero: LOOP on 0\n");
for (;;) {
mii_init();
for (phyno = 0; phyno < 32; ++phyno) {
- miiphy_read(phyno, PHY_PHYIDR1, &v);
+ fec8xx_miiphy_read(NULL, phyno, MII_PHYSID1, &v);
if (v == 0xFFFF)
continue;
- miiphy_write(phyno, PHY_BMCR, PHY_BMCR_POWD);
+ fec8xx_miiphy_write(NULL, phyno, MII_BMCR, BMCR_PDOWN);
udelay(10000);
- miiphy_write(phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON);
+ fec8xx_miiphy_write(NULL, phyno, MII_BMCR,
+ BMCR_RESET | BMCR_ANENABLE);
udelay(10000);
}
}
#define PB_GP_OUTVAL (_B(26) | _B(27) | _B(29) | _B(30))
#define PB_SP_DIRVAL 0
+#if CONFIG_NETPHONE_VERSION == 1
#define PC_GP_INMASK _BW(12)
#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(13) | _BW(15))
+#elif CONFIG_NETPHONE_VERSION == 2
+#define PC_GP_INMASK (_BW(13) | _BW(15))
+#define PC_GP_OUTMASK (_BW(10) | _BW(11) | _BW(12))
+#endif
#define PC_SP_MASK 0
#define PC_SOVAL 0
#define PC_INTVAL 0
#define PC_GP_OUTVAL (_BW(10) | _BW(11))
#define PC_SP_DIRVAL 0
+#if CONFIG_NETPHONE_VERSION == 1
#define PE_GP_INMASK _B(31)
#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27) | _B(28) | _B(29) | _B(30))
+#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28))
+#elif CONFIG_NETPHONE_VERSION == 2
+#define PE_GP_INMASK _BR(28, 31)
+#define PE_GP_OUTMASK (_B(17) | _B(18) |_B(20) | _B(24) | _B(27))
+#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27))
+#endif
#define PE_SP_MASK 0
#define PE_ODR_VAL 0
-#define PE_GP_OUTVAL (_B(20) | _B(24) | _B(27) | _B(28))
#define PE_SP_DIRVAL 0
int board_early_init_f(void)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile iop8xx_t *ioport = &immap->im_ioport;
volatile cpm8xx_t *cpm = &immap->im_cpm;
volatile memctl8xx_t *memctl = &immap->im_memctl;
/* NAND chip select */
+#if CONFIG_NETPHONE_VERSION == 1
memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_8_CLK | OR_EHTR | OR_TRLX);
memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
+#elif CONFIG_NETPHONE_VERSION == 2
+ upmconfig(UPMA, (uint *) nandcs_table, sizeof(nandcs_table) / sizeof(nandcs_table[0]));
+ memctl->memc_or1 = ((0xFFFFFFFFLU & ~(NAND_SIZE - 1)) | OR_BI | OR_G5LS);
+ memctl->memc_br1 = ((NAND_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMA);
+ memctl->memc_mamr = 0; /* all clear */
+#endif
/* DSP chip select */
memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_ACS_DIV2 | OR_SETA | OR_TRLX);
memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_V);
- /* External register chip select */
- memctl->memc_or4 = ((0xFFFFFFFFLU & ~(ER_SIZE - 1)) | OR_BI | OR_SCY_4_CLK);
- memctl->memc_br4 = ((ER_BASE & BR_BA_MSK) | BR_PS_32 | BR_V);
-
+#if CONFIG_NETPHONE_VERSION == 1
+ memctl->memc_br4 &= ~BR_V;
+#endif
memctl->memc_br5 &= ~BR_V;
memctl->memc_br6 &= ~BR_V;
memctl->memc_br7 &= ~BR_V;
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-
-#include <linux/mtd/nand.h>
-
-extern ulong nand_probe(ulong physadr);
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- unsigned long totlen;
-
- totlen = nand_probe(CFG_NAND_BASE);
- printf ("%4lu MB\n", totlen >> 20);
-}
-#endif
-
#ifdef CONFIG_HW_WATCHDOG
void hw_watchdog_reset(void)
static volatile int left_to_poll = PHONE_CONSOLE_POLL_HZ; /* poll */
-/* called from timer interrupt every 1/CFG_HZ sec */
+/* called from timer interrupt every 1/CONFIG_SYS_HZ sec */
void board_show_activity(ulong timestamp)
{
if (left_to_poll > -PHONE_CONSOLE_POLL_HZ)
#endif
-#if defined(CFG_CONSOLE_IS_IN_ENV) && defined(CFG_CONSOLE_OVERWRITE_ROUTINE)
+#if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE)
int overwrite_console(void)
{
/* printf("overwrite_console called\n"); */
extern int drv_phone_init(void);
extern int drv_phone_use_me(void);
+extern int drv_phone_is_idle(void);
int misc_init_r(void)
{
{
int i;
+#if CONFIG_NETPHONE_VERSION == 2
+ /* assert peripheral reset */
+ ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat &= ~_BW(12);
+ for (i = 0; i < 10; i++)
+ udelay(1000);
+ ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat |= _BW(12);
+#endif
reset_phys();
/* check in order to enable the local console */
left_to_poll = PHONE_CONSOLE_POLL_HZ;
- i = CFG_HZ * 2;
+ i = CONFIG_SYS_HZ * 2;
while (i > 0) {
- if (tstc()) {
+ if (tstc()) {
getc();
break;
}
do_poll();
if (drv_phone_use_me()) {
+ status_led_set(0, STATUS_LED_ON);
+ while (!drv_phone_is_idle()) {
+ do_poll();
+ udelay(1000000 / CONFIG_SYS_HZ);
+ }
+
console_assign(stdin, "phone");
console_assign(stdout, "phone");
console_assign(stderr, "phone");
break;
}
- udelay(1000000 / CFG_HZ);
+ udelay(1000000 / CONFIG_SYS_HZ);
i--;
left_to_poll--;
}
projects / karo-tx-uboot.git / blobdiff