include: configs: am43xx_evm: add 'usb stop' in usbboot env

[karo-tx-uboot.git] / board / sbc8548 / tlb.c

diff --git a/board/sbc8548/tlb.c b/board/sbc8548/tlb.c
index e9cedc7c0dc3a755f35af5543d1578d8d14be32b..2f7e4c536488150529f660fef1943ff44324f67a 100644 (file)
--- a/board/sbc8548/tlb.c
+++ b/board/sbc8548/tlb.c
@@ -4,23 +4,7 @@
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -76,6 +60,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 2, BOOKE_PAGESZ_64M, 1),
 
+#ifdef CONFIG_SYS_LBC_SDRAM_BASE
        /*
         * TLB 3:       64M     Cacheable, non-guarded
         * 0xf0000000   64M     LBC SDRAM First half
@@ -92,6 +77,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      CONFIG_SYS_LBC_SDRAM_BASE + 0x4000000,
                      MAS3_SX|MAS3_SW|MAS3_SR, 0,
                      0, 4, BOOKE_PAGESZ_64M, 1),
+#endif
 
        /*
         * TLB 5:       16M     Cacheable, non-guarded
@@ -104,6 +90,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 5, BOOKE_PAGESZ_16M, 1),
 
+#ifndef CONFIG_SYS_ALT_BOOT
        /*
         * TLB 6:       64M     Non-cacheable, guarded
         * 0xec000000   64M     64MB user FLASH
@@ -111,6 +98,24 @@ struct fsl_e_tlb_entry tlb_table[] = {
        SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH, CONFIG_SYS_ALT_FLASH,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 6, BOOKE_PAGESZ_64M, 1),
+#else
+       /*
+        * TLB 6:       4M      Non-cacheable, guarded
+        * 0xef800000   4M      1st 1/2 8MB soldered FLASH
+        */
+       SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH, CONFIG_SYS_ALT_FLASH,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 6, BOOKE_PAGESZ_4M, 1),
+
+       /*
+        * TLB 7:       4M      Non-cacheable, guarded
+        * 0xefc00000   4M      2nd half 8MB soldered FLASH
+        */
+       SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH + 0x400000,
+                     CONFIG_SYS_ALT_FLASH + 0x400000,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 7, BOOKE_PAGESZ_4M, 1),
+#endif
 
 };