mpc83xx: wait till UPM completes the write to array

[karo-tx-uboot.git] / common / spartan2.c

diff --git a/common/spartan2.c b/common/spartan2.c
index 0fb23b6592069140cdb56a0f09496211cd97a66c..ebac388b18ed1e77f8d6112a1ed6c1f9e2150085 100644 (file)
--- a/common/spartan2.c
+++ b/common/spartan2.c
@@ -25,8 +25,6 @@
 #include <common.h>            /* core U-Boot definitions */
 #include <spartan2.h>          /* Spartan-II device family */
 
-#if (CONFIG_FPGA & (CFG_XILINX | CFG_SPARTAN2))
-
 /* Define FPGA_DEBUG to get debug printf's */
 #ifdef FPGA_DEBUG
 #define PRINTF(fmt,args...)    printf (fmt ,##args)
@@ -441,7 +439,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
        int ret_val = FPGA_FAIL;        /* assume the worst */
        Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns;
        int i;
-       char  val;
+       unsigned char val;
 
        PRINTF ("%s: start with interface functions @ 0x%p\n",
                        __FUNCTION__, fn);
@@ -516,7 +514,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                                (*fn->clk) (FALSE, TRUE, cookie);
                                CONFIG_FPGA_DELAY ();
                                /* Write data */
-                               (*fn->wr) ((val < 0), TRUE, cookie);
+                               (*fn->wr) ((val & 0x80), TRUE, cookie);
                                CONFIG_FPGA_DELAY ();
                                /* Assert the clock */
                                (*fn->clk) (TRUE, TRUE, cookie);
@@ -561,6 +559,13 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                }
                putc ('\n');                    /* terminate the dotted line */
 
+               /*
+                * Run the post configuration function if there is one.
+                */
+               if (*fn->post) {
+                       (*fn->post) (cookie);
+               }
+
 #ifdef CFG_FPGA_PROG_FEEDBACK
                if (ret_val == FPGA_SUCCESS) {
                        puts ("Done.\n");
@@ -615,8 +620,10 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
                        PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
                                        desc);
 
-                       addr = (ulong) (fn->pre) + reloc_offset;
-                       fn_r->pre = (Xilinx_pre_fn) addr;
+                       if (fn->pre) {
+                               addr = (ulong) (fn->pre) + reloc_offset;
+                               fn_r->pre = (Xilinx_pre_fn) addr;
+                       }
 
                        addr = (ulong) (fn->pgm) + reloc_offset;
                        fn_r->pgm = (Xilinx_pgm_fn) addr;
@@ -633,6 +640,11 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
                        addr = (ulong) (fn->wr) + reloc_offset;
                        fn_r->wr = (Xilinx_wr_fn) addr;
 
+                       if (fn->post) {
+                               addr = (ulong) (fn->post) + reloc_offset;
+                               fn_r->post = (Xilinx_post_fn) addr;
+                       }
+
                        fn_r->relocated = TRUE;
 
                } else {
@@ -649,5 +661,3 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
        return ret_val;
 
 }
-
-#endif