s3c4510b: move specific code to soc directory

[karo-tx-uboot.git] / cpu / arm720t / cpu.c

diff --git a/cpu/arm720t/cpu.c b/cpu/arm720t/cpu.c
index 5ac8f59ab3caf2f1b551fc919b0ff64d3e814d52..8166982e6a7d0ab0892247c2dbb77a24930a4509 100644 (file)
--- a/cpu/arm720t/cpu.c
+++ b/cpu/arm720t/cpu.c
@@ -188,71 +188,9 @@ int dcache_status (void)
 {
        return (read_p15_c1 () & C1_IDC) != 0;
 }
-
-#elif defined(CONFIG_S3C4510B)
-
-void icache_enable (void)
-{
-       s32 i;
-
-       /* disable all cache bits */
-       CLR_REG( REG_SYSCFG, 0x3F);
-
-       /* 8KB cache, write enable */
-       SET_REG( REG_SYSCFG, CACHE_WRITE_BUFF | CACHE_MODE_01);
-
-       /* clear TAG RAM bits */
-       for ( i = 0; i < 256; i++)
-         PUT_REG( CACHE_TAG_RAM + 4*i, 0x00000000);
-
-       /* clear SET0 RAM */
-       for(i=0; i < 1024; i++)
-         PUT_REG( CACHE_SET0_RAM + 4*i, 0x00000000);
-
-       /* clear SET1 RAM */
-       for(i=0; i < 1024; i++)
-         PUT_REG( CACHE_SET1_RAM + 4*i, 0x00000000);
-
-       /* enable cache */
-       SET_REG( REG_SYSCFG, CACHE_ENABLE);
-
-}
-
-void icache_disable (void)
-{
-       /* disable all cache bits */
-       CLR_REG( REG_SYSCFG, 0x3F);
-}
-
-int icache_status (void)
-{
-       return GET_REG( REG_SYSCFG) & CACHE_ENABLE;
-}
-
-void dcache_enable (void)
-{
-       /* we don't have seperate instruction/data caches */
-       icache_enable();
-}
-
-void dcache_disable (void)
-{
-       /* we don't have seperate instruction/data caches */
-       icache_disable();
-}
-
-int dcache_status (void)
-{
-       /* we don't have seperate instruction/data caches */
-       return icache_status();
-}
-
 #elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
        /* No specific cache setup for IntegratorAP/CM720T as yet */
        void icache_enable (void)
        {
        }
-#elif defined(CONFIG_LPC2292) /* just to satisfy the compiler */
-#else
-#error No icache/dcache enable/disable functions defined for this CPU type
 #endif