AT91 CPU9260 CPU9G20 Fix compile warnings

[karo-tx-uboot.git] / doc / README.PXA_CF

diff --git a/doc/README.PXA_CF b/doc/README.PXA_CF
index 186f775f3caef97ba7d81e398f99dee4d6022a2d..6a0f236d3ca8e66555aaca60d46a37ceff508693 100644 (file)
--- a/doc/README.PXA_CF
+++ b/doc/README.PXA_CF
@@ -1,50 +1,48 @@
 
-These are brief instructions on how to add support for CF adapters to 
-custom designed  PXA boards. You need to set the parameters in the 
+These are brief instructions on how to add support for CF adapters to
+custom designed  PXA boards. You need to set the parameters in the
 config file. This should work for most implementations especially if you
 follow the connections of the standard lubbock. Anyway just the block
-marked memory configuration should be touched since the other parameters 
+marked memory configuration should be touched since the other parameters
 are imposed by the PXA architecture.
 
 #define CONFIG_PXA_PCMCIA 1
 #define CONFIG_PXA_IDE 1
 
-#define CONFIG_PCMCIA_SLOT_A 1 
+#define CONFIG_PCMCIA_SLOT_A 1
 /* just to keep build system happy  */
 
-#define CFG_PCMCIA_MEM_ADDR     0x28000000
-#define CFG_PCMCIA_MEM_SIZE     0x10000000
+#define CONFIG_SYS_PCMCIA_MEM_ADDR     0x28000000
+#define CONFIG_SYS_PCMCIA_MEM_SIZE     0x10000000
 
-#define CFG_MECR_VAL           0x00000000
-#define CFG_MCMEM0_VAL         0x00004204
-#define CFG_MCMEM1_VAL         0x00000000
-#define CFG_MCATT0_VAL         0x00010504
-#define CFG_MCATT1_VAL         0x00000000
-#define CFG_MCIO0_VAL          0x00008407
-#define CFG_MCIO1_VAL          0x00000000
+#define CONFIG_SYS_MECR_VAL            0x00000000
+#define CONFIG_SYS_MCMEM0_VAL          0x00004204
+#define CONFIG_SYS_MCMEM1_VAL          0x00000000
+#define CONFIG_SYS_MCATT0_VAL          0x00010504
+#define CONFIG_SYS_MCATT1_VAL          0x00000000
+#define CONFIG_SYS_MCIO0_VAL           0x00008407
+#define CONFIG_SYS_MCIO1_VAL           0x00000000
 /* memory configuration */
 
-#define CFG_IDE_MAXBUS         1       
+#define CONFIG_SYS_IDE_MAXBUS          1
 /* max. 1 IDE bus              */
-#define CFG_IDE_MAXDEVICE      1       
+#define CONFIG_SYS_IDE_MAXDEVICE       1
 /* max. 1 drive per IDE bus    */
 
-#define CFG_ATA_IDE0_OFFSET    0x0000
+#define CONFIG_SYS_ATA_IDE0_OFFSET     0x0000
 
-#define CFG_ATA_BASE_ADDR      0x20000000
+#define CONFIG_SYS_ATA_BASE_ADDR       0x20000000
 
 /* Offset for data I/O                 */
-#define CFG_ATA_DATA_OFFSET    0x1f0
+#define CONFIG_SYS_ATA_DATA_OFFSET     0x1f0
 
 /* Offset for normal register accesses */
-#define CFG_ATA_REG_OFFSET     0x1f0
+#define CONFIG_SYS_ATA_REG_OFFSET      0x1f0
 
 /* Offset for alternate registers      */
-#define CFG_ATA_ALT_OFFSET     0x3f0
-       
+#define CONFIG_SYS_ATA_ALT_OFFSET      0x3f0
 
-Another important point is that maybe you have to power the pcmcia 
+
+Another important point is that maybe you have to power the pcmcia
 subsystem. This is very board specific, for an example on how to
 do it please search for CONFIG_EXADRON1 in cmd_pcmcia.c
-
-