Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/shli/md

[karo-tx-linux.git] / drivers / acpi / spcr.c

diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index 3afa8c1fa12702c251d5d3654e2026ba0ebfcd62..4ac3e06b41d846440d35079dfa54885111eec0df 100644 (file)
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -36,6 +36,26 @@ static bool qdf2400_erratum_44_present(struct acpi_table_header *h)
        return false;
 }
 
+/*
+ * APM X-Gene v1 and v2 UART hardware is an 16550 like device but has its
+ * register aligned to 32-bit. In addition, the BIOS also encoded the
+ * access width to be 8 bits. This function detects this errata condition.
+ */
+static bool xgene_8250_erratum_present(struct acpi_table_spcr *tb)
+{
+       if (tb->interface_type != ACPI_DBG2_16550_COMPATIBLE)
+               return false;
+
+       if (memcmp(tb->header.oem_id, "APMC0D", ACPI_OEM_ID_SIZE))
+               return false;
+
+       if (!memcmp(tb->header.oem_table_id, "XGENESPC",
+           ACPI_OEM_TABLE_ID_SIZE) && tb->header.oem_revision == 0)
+               return true;
+
+       return false;
+}
+
 /**
  * parse_spcr() - parse ACPI SPCR table and add preferred console
  *
@@ -74,8 +94,22 @@ int __init parse_spcr(bool earlycon)
                goto done;
        }
 
-       iotype = table->serial_port.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY ?
-                       "mmio" : "io";
+       if (table->serial_port.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
+               switch (table->serial_port.access_width) {
+               default:
+                       pr_err("Unexpected SPCR Access Width.  Defaulting to byte size\n");
+               case ACPI_ACCESS_SIZE_BYTE:
+                       iotype = "mmio";
+                       break;
+               case ACPI_ACCESS_SIZE_WORD:
+                       iotype = "mmio16";
+                       break;
+               case ACPI_ACCESS_SIZE_DWORD:
+                       iotype = "mmio32";
+                       break;
+               }
+       } else
+               iotype = "io";
 
        switch (table->interface_type) {
        case ACPI_DBG2_ARM_SBSA_32BIT:
@@ -115,6 +149,8 @@ int __init parse_spcr(bool earlycon)
 
        if (qdf2400_erratum_44_present(&table->header))
                uart = "qdf2400_e44";
+       if (xgene_8250_erratum_present(table))
+               iotype = "mmio32";
 
        snprintf(opts, sizeof(opts), "%s,%s,0x%llx,%d", uart, iotype,
                 table->serial_port.address, baud_rate);