*
*/
-static struct file_operations sx_fw_fops = {
+static const struct file_operations sx_fw_fops = {
.owner = THIS_MODULE,
.ioctl = sx_fw_ioctl,
};
sx_dprintk (SX_DEBUG_RECEIVE, "rxop=%d, c = %d.\n", rx_op, c);
+ /* Don't copy past the end of the hardware receive buffer */
+ if (rx_op + c > 0x100) c = 0x100 - rx_op;
+
+ sx_dprintk (SX_DEBUG_RECEIVE, "c = %d.\n", c);
+
/* Don't copy more bytes than there is room for in the buffer */
c = tty_prepare_flip_string(tty, &rp, c);
sx_dprintk (SX_DEBUG_RECEIVE, "c = %d.\n", c);
- /* Don't copy past the end of the hardware receive buffer */
- if (rx_op + c > 0x100) c = 0x100 - rx_op;
-
- sx_dprintk (SX_DEBUG_RECEIVE, "c = %d.\n", c);
-
/* If for one reason or another, we can't copy more data, we're done! */
if (c == 0) break;
if(board->irq > 0) {
/* fixed irq, probably PCI */
if(sx_irqmask & (1 << board->irq)) { /* may we use this irq? */
- if(request_irq(board->irq, sx_interrupt, SA_SHIRQ | SA_INTERRUPT, "sx", board)) {
+ if(request_irq(board->irq, sx_interrupt, IRQF_SHARED | IRQF_DISABLED, "sx", board)) {
printk(KERN_ERR "sx: Cannot allocate irq %d.\n", board->irq);
board->irq = 0;
}
int irqmask = sx_irqmask & (IS_SX_BOARD(board) ? SX_ISA_IRQ_MASK : SI2_ISA_IRQ_MASK);
for(irqnr = 15; irqnr > 0; irqnr--)
if(irqmask & (1 << irqnr))
- if(! request_irq(irqnr, sx_interrupt, SA_SHIRQ | SA_INTERRUPT, "sx", board))
+ if(! request_irq(irqnr, sx_interrupt, IRQF_SHARED | IRQF_DISABLED, "sx", board))
break;
if(! irqnr)
printk(KERN_ERR "sx: Cannot allocate IRQ.\n");
if ( IS_SI1_BOARD(board)) {
/* This should be an SI1 board, which has this
location writable... */
- if (read_sx_byte (board, SI2_ISA_ID_BASE) != 0x10)
+ if (read_sx_byte (board, SI2_ISA_ID_BASE) != 0x10) {
func_exit ();
return 0;
+ }
} else {
/* This should be an SI2 board, which has the bottom
3 bits non-writable... */
- if (read_sx_byte (board, SI2_ISA_ID_BASE) == 0x10)
+ if (read_sx_byte (board, SI2_ISA_ID_BASE) == 0x10) {
func_exit ();
return 0;
+ }
}
/* Now we're pretty much convinced that there is an SI board here,
if ( IS_SI1_BOARD(board)) {
/* This should be an SI1 board, which has this
location writable... */
- if (read_sx_byte (board, SI2_ISA_ID_BASE) != 0x10)
+ if (read_sx_byte (board, SI2_ISA_ID_BASE) != 0x10) {
func_exit();
return 0;
+ }
} else {
/* This should be an SI2 board, which has the bottom
3 bits non-writable... */
- if (read_sx_byte (board, SI2_ISA_ID_BASE) == 0x10)
+ if (read_sx_byte (board, SI2_ISA_ID_BASE) == 0x10) {
func_exit ();
return 0;
+ }
}
printheader ();
port->board = board;
port->gs.rd = &sx_real_driver;
#ifdef NEW_WRITE_LOCKING
- port->gs.port_write_sem = MUTEX;
+ port->gs.port_write_mutex = MUTEX;
#endif
- port->gs.driver_lock = SPIN_LOCK_UNLOCKED;
+ spin_lock_init(&port->gs.driver_lock);
/*
* Initializing wait queue
*/