Merge branch 'master' of git://www.denx.de/git/u-boot-video

[karo-tx-uboot.git] / drivers / fpga / altera.c

diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index 650f2ec73473647d9b0e413026996dddb86196f2..af189f4ef4c580f9231a95b07ff76cbccfa23904 100644 (file)
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -5,24 +5,7 @@
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -45,7 +28,7 @@
 static int altera_validate (Altera_desc * desc, const char *fn);
 
 /* ------------------------------------------------------------------------- */
-int altera_load( Altera_desc *desc, void *buf, size_t bsize )
+int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;        /* assume a failure */
 
@@ -60,7 +43,7 @@ int altera_load( Altera_desc *desc, void *buf, size_t bsize )
                                        __FUNCTION__);
                        ret_val = ACEX1K_load (desc, buf, bsize);
 #elif defined(CONFIG_FPGA_CYCLON2)
-                       PRINTF ("%s: Launching the CYCLON II Loader...\n",
+                       PRINTF ("%s: Launching the CYCLONE II Loader...\n",
                                        __FUNCTION__);
                        ret_val = CYC2_load (desc, buf, bsize);
 #else
@@ -85,7 +68,7 @@ int altera_load( Altera_desc *desc, void *buf, size_t bsize )
        return ret_val;
 }
 
-int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
+int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;        /* assume a failure */
 
@@ -215,7 +198,7 @@ int altera_info( Altera_desc *desc )
 
 static int altera_validate (Altera_desc * desc, const char *fn)
 {
-       int ret_val = FALSE;
+       int ret_val = false;
 
        if (desc) {
                if ((desc->family > min_altera_type) &&
@@ -223,7 +206,7 @@ static int altera_validate (Altera_desc * desc, const char *fn)
                        if ((desc->iface > min_altera_iface_type) &&
                                (desc->iface < max_altera_iface_type)) {
                                if (desc->size) {
-                                       ret_val = TRUE;
+                                       ret_val = true;
                                } else {
                                        printf ("%s: NULL part size\n", fn);
                                }