cfi_flash: flinfo: allow user interrupt in flash print info fn

[karo-tx-uboot.git] / drivers / fpga / spartan3.c

diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 0fe30410a6f93c090e9ee0e8f60fab6e22bfe66b..7a89b5692cbc5f4f344e90e0eb78f6018b76cc9c 100644 (file)
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -385,34 +385,38 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
                } while ((*fn->init) (cookie));
 
                /* Load the data */
-               while (bytecount < bsize) {
-
-                       /* Xilinx detects an error if INIT goes low (active)
-                          while DONE is low (inactive) */
-                       if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
-                               puts ("** CRC error during FPGA load.\n");
-                               return (FPGA_FAIL);
-                       }
-                       val = data [bytecount ++];
-                       i = 8;
-                       do {
-                               /* Deassert the clock */
-                               (*fn->clk) (FALSE, TRUE, cookie);
-                               CONFIG_FPGA_DELAY ();
-                               /* Write data */
-                               (*fn->wr) ((val & 0x80), TRUE, cookie);
-                               CONFIG_FPGA_DELAY ();
-                               /* Assert the clock */
-                               (*fn->clk) (TRUE, TRUE, cookie);
-                               CONFIG_FPGA_DELAY ();
-                               val <<= 1;
-                               i --;
-                       } while (i > 0);
+               if(*fn->bwr)
+                       (*fn->bwr) (data, bsize, TRUE, cookie);
+               else {
+                       while (bytecount < bsize) {
+
+                               /* Xilinx detects an error if INIT goes low (active)
+                                  while DONE is low (inactive) */
+                               if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
+                                       puts ("** CRC error during FPGA load.\n");
+                                       return (FPGA_FAIL);
+                               }
+                               val = data [bytecount ++];
+                               i = 8;
+                               do {
+                                       /* Deassert the clock */
+                                       (*fn->clk) (FALSE, TRUE, cookie);
+                                       CONFIG_FPGA_DELAY ();
+                                       /* Write data */
+                                       (*fn->wr) ((val & 0x80), TRUE, cookie);
+                                       CONFIG_FPGA_DELAY ();
+                                       /* Assert the clock */
+                                       (*fn->clk) (TRUE, TRUE, cookie);
+                                       CONFIG_FPGA_DELAY ();
+                                       val <<= 1;
+                                       i --;
+                               } while (i > 0);
 
 #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
-                       if (bytecount % (bsize / 40) == 0)
-                               putc ('.');             /* let them know we are alive */
+                               if (bytecount % (bsize / 40) == 0)
+                                       putc ('.');             /* let them know we are alive */
 #endif
+                       }
                }
 
                CONFIG_FPGA_DELAY ();