sizes.h - consolidate for all architectures

[karo-tx-uboot.git] / drivers / gpio / s5p_gpio.c

diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index a1bcddcf45583b9d97ef10973783e3d498016f6b..11a0472c695eeb4c9aeae1e663a7a62e186ff411 100644 (file)
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -2,25 +2,17 @@
  * (C) Copyright 2009 Samsung Electronics
  * Minkyu Kang <mk7.kang@samsung.com>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <asm/io.h>
-#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
+
+#define S5P_GPIO_GET_BANK(x)   ((x >> S5P_GPIO_BANK_SHIFT) \
+                               & S5P_GPIO_BANK_MASK)
+
+#define S5P_GPIO_GET_PIN(x)    (x & S5P_GPIO_PIN_MASK)
 
 #define CON_MASK(x)            (0xf << ((x) << 2))
 #define CON_SFR(x, v)          ((v) << ((x) << 2))
@@ -36,7 +28,7 @@
 #define RATE_MASK(x)           (0x1 << (x + 16))
 #define RATE_SET(x)            (0x1 << (x + 16))
 
-void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg)
+void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg)
 {
        unsigned int value;
 
@@ -46,25 +38,18 @@ void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg)
        writel(value, &bank->con);
 }
 
-void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en)
+void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en)
 {
-       unsigned int value;
-
-       gpio_cfg_pin(bank, gpio, GPIO_OUTPUT);
-
-       value = readl(&bank->dat);
-       value &= ~DAT_MASK(gpio);
-       if (en)
-               value |= DAT_SET(gpio);
-       writel(value, &bank->dat);
+       s5p_gpio_cfg_pin(bank, gpio, GPIO_OUTPUT);
+       s5p_gpio_set_value(bank, gpio, en);
 }
 
-void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio)
+void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio)
 {
-       gpio_cfg_pin(bank, gpio, GPIO_INPUT);
+       s5p_gpio_cfg_pin(bank, gpio, GPIO_INPUT);
 }
 
-void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en)
+void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en)
 {
        unsigned int value;
 
@@ -75,7 +60,7 @@ void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en)
        writel(value, &bank->dat);
 }
 
-unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio)
+unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio)
 {
        unsigned int value;
 
@@ -83,7 +68,7 @@ unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio)
        return !!(value & DAT_MASK(gpio));
 }
 
-void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode)
+void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode)
 {
        unsigned int value;
 
@@ -102,7 +87,7 @@ void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode)
        writel(value, &bank->pull);
 }
 
-void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode)
+void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode)
 {
        unsigned int value;
 
@@ -123,7 +108,7 @@ void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode)
        writel(value, &bank->drv);
 }
 
-void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode)
+void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode)
 {
        unsigned int value;
 
@@ -141,3 +126,56 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode)
 
        writel(value, &bank->drv);
 }
+
+struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio)
+{
+       unsigned bank = S5P_GPIO_GET_BANK(gpio);
+       unsigned base = s5p_gpio_base(gpio);
+
+       return (struct s5p_gpio_bank *)(base + bank);
+}
+
+int s5p_gpio_get_pin(unsigned gpio)
+{
+       return S5P_GPIO_GET_PIN(gpio);
+}
+
+/* Common GPIO API */
+
+int gpio_request(unsigned gpio, const char *label)
+{
+       return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+       return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+       s5p_gpio_direction_input(s5p_gpio_get_bank(gpio),
+                               s5p_gpio_get_pin(gpio));
+       return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+       s5p_gpio_direction_output(s5p_gpio_get_bank(gpio),
+                                s5p_gpio_get_pin(gpio), value);
+       return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+       return (int) s5p_gpio_get_value(s5p_gpio_get_bank(gpio),
+                                      s5p_gpio_get_pin(gpio));
+}
+
+int gpio_set_value(unsigned gpio, int value)
+{
+       s5p_gpio_set_value(s5p_gpio_get_bank(gpio),
+                         s5p_gpio_get_pin(gpio), value);
+
+       return 0;
+}