drm/i915: Mark CPU cache as dirty on every transition for CPU writes

[karo-tx-linux.git] / drivers / gpu / drm / i915 / i915_gem_execbuffer.c

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 96705171e397206c02580fe8708619fbd8e80212..2a9aed5640e267f348f1368f883e53189dac85a7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -309,7 +309,7 @@ static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
                return DBG_USE_CPU_RELOC > 0;
 
        return (HAS_LLC(to_i915(obj->base.dev)) ||
-               obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
+               obj->cache_dirty ||
                obj->cache_level != I915_CACHE_NONE);
 }
 
@@ -1110,10 +1110,8 @@ eb_move_to_gpu(struct i915_execbuffer *eb)
                if (vma->exec_entry->flags & EXEC_OBJECT_ASYNC)
                        continue;
 
-               if (obj->base.write_domain & I915_GEM_DOMAIN_CPU) {
+               if (obj->cache_dirty)
                        i915_gem_clflush_object(obj, 0);
-                       obj->base.write_domain = 0;
-               }
 
                ret = i915_gem_request_await_object
                        (eb->request, obj, obj->base.pending_write_domain);
@@ -1248,12 +1246,6 @@ static int eb_select_context(struct i915_execbuffer *eb)
        return 0;
 }
 
-static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
-{
-       return !(obj->cache_level == I915_CACHE_NONE ||
-                obj->cache_level == I915_CACHE_WT);
-}
-
 void i915_vma_move_to_active(struct i915_vma *vma,
                             struct drm_i915_gem_request *req,
                             unsigned int flags)
@@ -1277,15 +1269,16 @@ void i915_vma_move_to_active(struct i915_vma *vma,
        i915_gem_active_set(&vma->last_read[idx], req);
        list_move_tail(&vma->vm_link, &vma->vm->active_list);
 
+       obj->base.write_domain = 0;
        if (flags & EXEC_OBJECT_WRITE) {
+               obj->base.write_domain = I915_GEM_DOMAIN_RENDER;
+
                if (intel_fb_obj_invalidate(obj, ORIGIN_CS))
                        i915_gem_active_set(&obj->frontbuffer_write, req);
 
-               /* update for the implicit flush after a batch */
-               obj->base.write_domain &= ~I915_GEM_GPU_DOMAINS;
-               if (!obj->cache_dirty && gpu_write_needs_clflush(obj))
-                       obj->cache_dirty = true;
+               obj->base.read_domains = 0;
        }
+       obj->base.read_domains |= I915_GEM_GPU_DOMAINS;
 
        if (flags & EXEC_OBJECT_NEEDS_FENCE)
                i915_gem_active_set(&vma->last_fence, req);