]> git.kernelconcepts.de Git - karo-tx-linux.git/blobdiff - drivers/mfd/arizona-core.c
mfd: arizona: Unconditionally enable 32kHz clock
[karo-tx-linux.git] / drivers / mfd / arizona-core.c
index b562c7bf8a463903bf4b99d0b6c54b9a1358cf4f..1eb963c5cd227d660267943be2d6f4bf7cc5329b 100644 (file)
@@ -39,11 +39,21 @@ int arizona_clk32k_enable(struct arizona *arizona)
 
        arizona->clk32k_ref++;
 
-       if (arizona->clk32k_ref == 1)
+       if (arizona->clk32k_ref == 1) {
+               switch (arizona->pdata.clk32k_src) {
+               case ARIZONA_32KZ_MCLK1:
+                       ret = pm_runtime_get_sync(arizona->dev);
+                       if (ret != 0)
+                               goto out;
+                       break;
+               }
+
                ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
                                         ARIZONA_CLK_32K_ENA,
                                         ARIZONA_CLK_32K_ENA);
+       }
 
+out:
        if (ret != 0)
                arizona->clk32k_ref--;
 
@@ -63,10 +73,17 @@ int arizona_clk32k_disable(struct arizona *arizona)
 
        arizona->clk32k_ref--;
 
-       if (arizona->clk32k_ref == 0)
+       if (arizona->clk32k_ref == 0) {
                regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
                                   ARIZONA_CLK_32K_ENA, 0);
 
+               switch (arizona->pdata.clk32k_src) {
+               case ARIZONA_32KZ_MCLK1:
+                       pm_runtime_put_sync(arizona->dev);
+                       break;
+               }
+       }
+
        mutex_unlock(&arizona->clk_lock);
 
        return ret;
@@ -235,18 +252,21 @@ static int arizona_runtime_resume(struct device *dev)
 
        ret = arizona_wait_for_boot(arizona);
        if (ret != 0) {
-               regulator_disable(arizona->dcvdd);
-               return ret;
+               goto err;
        }
 
        ret = regcache_sync(arizona->regmap);
        if (ret != 0) {
                dev_err(arizona->dev, "Failed to restore register cache\n");
-               regulator_disable(arizona->dcvdd);
-               return ret;
+               goto err;
        }
 
        return 0;
+
+err:
+       regcache_cache_only(arizona->regmap, true);
+       regulator_disable(arizona->dcvdd);
+       return ret;
 }
 
 static int arizona_runtime_suspend(struct device *dev)
@@ -498,6 +518,7 @@ int arizona_dev_init(struct arizona *arizona)
                regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
                                   ARIZONA_CLK_32K_SRC_MASK,
                                   arizona->pdata.clk32k_src - 1);
+               arizona_clk32k_enable(arizona);
                break;
        case ARIZONA_32KZ_NONE:
                regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
@@ -511,10 +532,16 @@ int arizona_dev_init(struct arizona *arizona)
        }
 
        for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
-               if (!arizona->pdata.micbias[i].mV)
+               if (!arizona->pdata.micbias[i].mV &&
+                   !arizona->pdata.micbias[i].bypass)
                        continue;
 
+               /* Apply default for bypass mode */
+               if (!arizona->pdata.micbias[i].mV)
+                       arizona->pdata.micbias[i].mV = 2800;
+
                val = (arizona->pdata.micbias[i].mV - 1500) / 100;
+
                val <<= ARIZONA_MICB1_LVL_SHIFT;
 
                if (arizona->pdata.micbias[i].ext_cap)
@@ -526,10 +553,14 @@ int arizona_dev_init(struct arizona *arizona)
                if (arizona->pdata.micbias[i].fast_start)
                        val |= ARIZONA_MICB1_RATE;
 
+               if (arizona->pdata.micbias[i].bypass)
+                       val |= ARIZONA_MICB1_BYPASS;
+
                regmap_update_bits(arizona->regmap,
                                   ARIZONA_MIC_BIAS_CTRL_1 + i,
                                   ARIZONA_MICB1_LVL_MASK |
                                   ARIZONA_MICB1_DISCH |
+                                  ARIZONA_MICB1_BYPASS |
                                   ARIZONA_MICB1_RATE, val);
        }