Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

[karo-tx-uboot.git] / drivers / mtd / nand / ndfc.c

diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index 528b22b49aeb32ec2a57720d385a080c12bd9a8d..34688e9bef43231caac3f709a9f5a5f4165ae721 100644 (file)
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -10,23 +10,7 @@
  *     Thomas Gleixner
  *     Copyright 2006 IBM
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -35,7 +19,14 @@
 #include <linux/mtd/nand_ecc.h>
 #include <asm/processor.h>
 #include <asm/io.h>
-#include <ppc4xx.h>
+#include <asm/ppc4xx.h>
+
+#ifndef CONFIG_SYS_NAND_BCR
+#define CONFIG_SYS_NAND_BCR 0x80002222
+#endif
+#ifndef CONFIG_SYS_NDFC_EBC0_CFG
+#define CONFIG_SYS_NDFC_EBC0_CFG 0xb8400000
+#endif
 
 /*
  * We need to store the info, which chip-select (CS) is used for the
@@ -89,8 +80,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
 
        /* The NDFC uses Smart Media (SMC) bytes order
         */
-       ecc_code[0] = p[2];
-       ecc_code[1] = p[1];
+       ecc_code[0] = p[1];
+       ecc_code[1] = p[2];
        ecc_code[2] = p[3];
 
        return 0;
@@ -140,12 +131,25 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len
 
        return 0;
 }
-#endif /* #ifndef CONFIG_NAND_SPL */
 
-#ifndef CONFIG_SYS_NAND_BCR
-#define CONFIG_SYS_NAND_BCR 0x80002222
+/*
+ * Read a byte from the NDFC.
+ */
+static uint8_t ndfc_read_byte(struct mtd_info *mtd)
+{
+
+       struct nand_chip *chip = mtd->priv;
+
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
+       return (uint8_t) readw(chip->IO_ADDR_R);
+#else
+       return readb(chip->IO_ADDR_R);
 #endif
 
+}
+
+#endif /* #ifndef CONFIG_NAND_SPL */
+
 void board_nand_select_device(struct nand_chip *nand, int chip)
 {
        /*
@@ -196,22 +200,28 @@ int board_nand_init(struct nand_chip *nand)
        nand->ecc.mode = NAND_ECC_HW;
        nand->ecc.size = 256;
        nand->ecc.bytes = 3;
+       nand->ecc.strength = 1;
        nand->select_chip = ndfc_select_chip;
 
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
+       nand->options |= NAND_BUSWIDTH_16;
+#endif
+
 #ifndef CONFIG_NAND_SPL
        nand->write_buf  = ndfc_write_buf;
        nand->verify_buf = ndfc_verify_buf;
+       nand->read_byte = ndfc_read_byte;
+
+       chip++;
 #else
        /*
         * Setup EBC (CS0 only right now)
         */
-       mtebc(EBC0_CFG, 0xb8400000);
+       mtebc(EBC0_CFG, CONFIG_SYS_NDFC_EBC0_CFG);
 
-       mtebc(pb0cr, CONFIG_SYS_EBC_PB0CR);
-       mtebc(pb0ap, CONFIG_SYS_EBC_PB0AP);
+       mtebc(PB0CR, CONFIG_SYS_EBC_PB0CR);
+       mtebc(PB0AP, CONFIG_SYS_EBC_PB0AP);
 #endif
 
-       chip++;
-
        return 0;
 }