notes (i.e. double reset)
- some minor code cleanups
These changes are tested with DM9000{A,EP,E} together
- with a 200MHz Atmel AT91SAM92161 core
+ with a 200MHz Atmel AT91SAM9261 core
TODO: external MII is not functional, only internal at the moment.
*/
#include <command.h>
#include <net.h>
#include <asm/io.h>
+#include <dm9000.h>
#include "dm9000x.h"
#define DM9000_DMP_PACKET(func,packet,length) \
do { \
int i; \
- printf(func ": length: %d\n", length); \
+ printf("%s: length: %d\n", func, length); \
for (i = 0; i < length; i++) { \
if (i % 8 == 0) \
printf("\n%s: %02x: ", func, i); \
void (*outblk)(volatile void *data_ptr, int count);
void (*inblk)(void *data_ptr, int count);
void (*rx_status)(u16 *RxStatus, u16 *RxLen);
+ struct eth_device netdev;
} board_info_t;
static board_info_t dm9000_info;
+
/* function declaration ------------------------------------- */
-int eth_init(bd_t * bd);
-int eth_send(volatile void *, int);
-int eth_rx(void);
-void eth_halt(void);
static int dm9000_probe(void);
-static u16 phy_read(int);
-static void phy_write(int, u16);
-u16 read_srom_word(int);
+static u16 dm9000_phy_read(int);
+static void dm9000_phy_write(int, u16);
static u8 DM9000_ior(int);
static void DM9000_iow(int reg, u8 value);
/* DM9000 network board routine ---------------------------- */
-
-#define DM9000_outb(d,r) ( *(volatile u8 *)r = d )
-#define DM9000_outw(d,r) ( *(volatile u16 *)r = d )
-#define DM9000_outl(d,r) ( *(volatile u32 *)r = d )
-#define DM9000_inb(r) (*(volatile u8 *)r)
-#define DM9000_inw(r) (*(volatile u16 *)r)
-#define DM9000_inl(r) (*(volatile u32 *)r)
+#ifndef CONFIG_DM9000_BYTE_SWAPPED
+#define DM9000_outb(d,r) writeb(d, (volatile u8 *)(r))
+#define DM9000_outw(d,r) writew(d, (volatile u16 *)(r))
+#define DM9000_outl(d,r) writel(d, (volatile u32 *)(r))
+#define DM9000_inb(r) readb((volatile u8 *)(r))
+#define DM9000_inw(r) readw((volatile u16 *)(r))
+#define DM9000_inl(r) readl((volatile u32 *)(r))
+#else
+#define DM9000_outb(d, r) __raw_writeb(d, r)
+#define DM9000_outw(d, r) __raw_writew(d, r)
+#define DM9000_outl(d, r) __raw_writel(d, r)
+#define DM9000_inb(r) __raw_readb(r)
+#define DM9000_inw(r) __raw_readw(r)
+#define DM9000_inl(r) __raw_readl(r)
+#endif
#ifdef CONFIG_DM9000_DEBUG
static void
printf("ERROR: resetting DM9000 -> not responding\n");
}
-/* Initilize dm9000 board
+/* Initialize dm9000 board
*/
-int
-eth_init(bd_t * bd)
+static int dm9000_init(struct eth_device *dev, bd_t *bd)
{
int i, oft, lnk;
u8 io_mode;
struct board_info *db = &dm9000_info;
- DM9000_DBG("eth_init()\n");
+ DM9000_DBG("%s\n", __func__);
/* RESET device */
dm9000_reset();
/* Clear interrupt status */
DM9000_iow(DM9000_ISR, ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS);
- /* Set Node address */
-#if !defined(CONFIG_AT91SAM9261EK)
- for (i = 0; i < 6; i++)
- ((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i);
-#endif
-
- if (is_zero_ether_addr(bd->bi_enetaddr) ||
- is_multicast_ether_addr(bd->bi_enetaddr)) {
- /* try reading from environment */
- u8 i;
- char *s, *e;
- s = getenv ("ethaddr");
- for (i = 0; i < 6; ++i) {
- bd->bi_enetaddr[i] = s ?
- simple_strtoul (s, &e, 16) : 0;
- if (s)
- s = (*e) ? e + 1 : e;
- }
- }
-
- printf("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", bd->bi_enetaddr[0],
- bd->bi_enetaddr[1], bd->bi_enetaddr[2], bd->bi_enetaddr[3],
- bd->bi_enetaddr[4], bd->bi_enetaddr[5]);
+ printf("MAC: %pM\n", dev->enetaddr);
/* fill device MAC address registers */
for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
- DM9000_iow(oft, bd->bi_enetaddr[i]);
+ DM9000_iow(oft, dev->enetaddr[i]);
for (i = 0, oft = 0x16; i < 8; i++, oft++)
DM9000_iow(oft, 0xff);
DM9000_iow(DM9000_IMR, IMR_PAR);
i = 0;
- while (!(phy_read(1) & 0x20)) { /* autonegation complete bit */
+ while (!(dm9000_phy_read(1) & 0x20)) { /* autonegation complete bit */
udelay(1000);
i++;
if (i == 10000) {
}
/* see what we've got */
- lnk = phy_read(17) >> 12;
+ lnk = dm9000_phy_read(17) >> 12;
printf("operating at ");
switch (lnk) {
case 1:
Hardware start transmission.
Send a packet to media from the upper layer.
*/
-int
-eth_send(volatile void *packet, int length)
+static int dm9000_send(struct eth_device *netdev, volatile void *packet,
+ int length)
{
int tmo;
struct board_info *db = &dm9000_info;
- DM9000_DMP_PACKET("eth_send", packet, length);
+ DM9000_DMP_PACKET(__func__ , packet, length);
DM9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
Stop the interface.
The interface is stopped when it is brought.
*/
-void
-eth_halt(void)
+static void dm9000_halt(struct eth_device *netdev)
{
- DM9000_DBG("eth_halt\n");
+ DM9000_DBG("%s\n", __func__);
/* RESET devie */
- phy_write(0, 0x8000); /* PHY RESET */
+ dm9000_phy_write(0, 0x8000); /* PHY RESET */
DM9000_iow(DM9000_GPR, 0x01); /* Power-Down PHY */
DM9000_iow(DM9000_IMR, 0x80); /* Disable all interrupt */
DM9000_iow(DM9000_RCR, 0x00); /* Disable RX */
/*
Received a packet and pass to upper layer
*/
-int
-eth_rx(void)
+static int dm9000_rx(struct eth_device *netdev)
{
u8 rxbyte, *rdptr = (u8 *) NetRxPackets[0];
u16 RxStatus, RxLen = 0;
dm9000_reset();
}
} else {
- DM9000_DMP_PACKET("eth_rx", rdptr, RxLen);
+ DM9000_DMP_PACKET(__func__ , rdptr, RxLen);
DM9000_DBG("passing packet to upper layer\n");
NetReceive(NetRxPackets[0], RxLen);
/*
Read a word data from SROM
*/
-u16
-read_srom_word(int offset)
+#if !defined(CONFIG_DM9000_NO_SROM)
+void dm9000_read_srom_word(int offset, u8 *to)
{
DM9000_iow(DM9000_EPAR, offset);
DM9000_iow(DM9000_EPCR, 0x4);
udelay(8000);
DM9000_iow(DM9000_EPCR, 0x0);
- return (DM9000_ior(DM9000_EPDRL) + (DM9000_ior(DM9000_EPDRH) << 8));
+ to[0] = DM9000_ior(DM9000_EPDRL);
+ to[1] = DM9000_ior(DM9000_EPDRH);
}
-void
-write_srom_word(int offset, u16 val)
+void dm9000_write_srom_word(int offset, u16 val)
{
DM9000_iow(DM9000_EPAR, offset);
DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
udelay(8000);
DM9000_iow(DM9000_EPCR, 0);
}
+#endif
+static void dm9000_get_enetaddr(struct eth_device *dev)
+{
+#if !defined(CONFIG_DM9000_NO_SROM)
+ int i;
+ for (i = 0; i < 3; i++)
+ dm9000_read_srom_word(i, dev->enetaddr + (2 * i));
+#endif
+}
/*
Read a byte from I/O port
Read a word from phyxcer
*/
static u16
-phy_read(int reg)
+dm9000_phy_read(int reg)
{
u16 val;
val = (DM9000_ior(DM9000_EPDRH) << 8) | DM9000_ior(DM9000_EPDRL);
/* The read data keeps on REG_0D & REG_0E */
- DM9000_DBG("phy_read(0x%x): 0x%x\n", reg, val);
+ DM9000_DBG("dm9000_phy_read(0x%x): 0x%x\n", reg, val);
return val;
}
Write a word to phyxcer
*/
static void
-phy_write(int reg, u16 value)
+dm9000_phy_write(int reg, u16 value)
{
/* Fill the phyxcer register into REG_0C */
DM9000_iow(DM9000_EPCR, 0xa); /* Issue phyxcer write command */
udelay(500); /* Wait write complete */
DM9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer write command */
- DM9000_DBG("phy_write(reg:0x%x, value:0x%x)\n", reg, value);
+ DM9000_DBG("dm9000_phy_write(reg:0x%x, value:0x%x)\n", reg, value);
+}
+
+int dm9000_initialize(bd_t *bis)
+{
+ struct eth_device *dev = &(dm9000_info.netdev);
+
+ /* Load MAC address from EEPROM */
+ dm9000_get_enetaddr(dev);
+
+ dev->init = dm9000_init;
+ dev->halt = dm9000_halt;
+ dev->send = dm9000_send;
+ dev->recv = dm9000_rx;
+ sprintf(dev->name, "dm9000");
+
+ eth_register(dev);
+
+ return 0;
}