stmmac: add mixed burst for DMA

[karo-tx-linux.git] / drivers / net / ethernet / stmicro / stmmac / stmmac_main.c

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index efc42e1f9b4aef4b6fa2be572494cb837d360ab5..d1d084018877a2c73fed37143f58f1db7f1ba74a 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -168,6 +168,9 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
 #ifdef CONFIG_HAVE_CLK
        u32 clk_rate;
 
+       if (IS_ERR(priv->stmmac_clk))
+               return;
+
        clk_rate = clk_get_rate(priv->stmmac_clk);
 
        /* Platform provided default clk_csr would be assumed valid
@@ -922,6 +925,7 @@ static void stmmac_check_ether_addr(struct stmmac_priv *priv)
 static int stmmac_init_dma_engine(struct stmmac_priv *priv)
 {
        int pbl = DEFAULT_DMA_PBL, fixed_burst = 0, burst_len = 0;
+       int mixed_burst = 0;
 
        /* Some DMA parameters can be passed from the platform;
         * in case of these are not passed we keep a default
@@ -929,10 +933,11 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
        if (priv->plat->dma_cfg) {
                pbl = priv->plat->dma_cfg->pbl;
                fixed_burst = priv->plat->dma_cfg->fixed_burst;
+               mixed_burst = priv->plat->dma_cfg->mixed_burst;
                burst_len = priv->plat->dma_cfg->burst_len;
        }
 
-       return priv->hw->dma->init(priv->ioaddr, pbl, fixed_burst,
+       return priv->hw->dma->init(priv->ioaddr, pbl, fixed_burst, mixed_burst,
                                   burst_len, priv->dma_tx_phy,
                                   priv->dma_rx_phy);
 }
@@ -1462,7 +1467,7 @@ static void stmmac_set_rx_mode(struct net_device *dev)
        struct stmmac_priv *priv = netdev_priv(dev);
 
        spin_lock(&priv->lock);
-       priv->hw->mac->set_filter(dev);
+       priv->hw->mac->set_filter(dev, priv->synopsys_id);
        spin_unlock(&priv->lock);
 }
 
@@ -1803,7 +1808,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
        priv->hw->ring = &ring_mode_ops;
 
        /* Get and dump the chip ID */
-       stmmac_get_synopsys_id(priv);
+       priv->synopsys_id = stmmac_get_synopsys_id(priv);
 
        /* Get the HW capability (new GMAC newer than 3.50a) */
        priv->hw_cap_support = stmmac_get_hw_features(priv);
@@ -1923,7 +1928,7 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
        }
 
        if (stmmac_clk_get(priv))
-               goto error;
+               pr_warning("%s: warning: cannot get CSR clock\n", __func__);
 
        /* If a specific clk_csr value is passed from the platform
         * this means that the CSR Clock Range selection cannot be