karo: tx6ul: make board string dependent on cpurev

[karo-tx-uboot.git] / drivers / spi / ti_qspi.c

diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index c5d2245e4460bd8881d40f2e2bde2ffa990e3930..bd63db8a2acc52ffc26a3da283c6cf3bcb6e3e07 100644 (file)
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -13,6 +13,8 @@
 #include <spi.h>
 #include <asm/gpio.h>
 #include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
+#include <asm/ti-common/ti-edma3.h>
 
 /* ti qpsi register bit masks */
 #define QSPI_TIMEOUT                    2000000
@@ -102,16 +104,24 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
        struct spi_slave *slave = &qslave->slave;
        u32 memval = 0;
 
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
        slave->memory_map = (void *)MMAP_START_ADDR_DRA;
 #else
        slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
 #endif
 
+#ifdef CONFIG_QSPI_QUAD_SUPPORT
+       memval |= (QSPI_CMD_READ_QUAD | QSPI_SETUP0_NUM_A_BYTES |
+                       QSPI_SETUP0_NUM_D_BYTES_8_BITS |
+                       QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE |
+                       QSPI_NUM_DUMMY_BITS);
+       slave->op_mode_rx = SPI_OPM_RX_QOF;
+#else
        memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
                        QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
                        QSPI_SETUP0_READ_NORMAL | QSPI_CMD_WRITE |
                        QSPI_NUM_DUMMY_BITS;
+#endif
 
        writel(memval, &qslave->base->setup0);
 }
@@ -243,7 +253,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
        uint status;
        int timeout;
 
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
        int val;
 #endif
 
@@ -253,7 +263,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
        /* Setup mmap flags */
        if (flags & SPI_XFER_MMAP) {
                writel(MM_SWITCH, &qslave->base->memswitch);
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
                val = readl(CORE_CTRL_IO);
                val |= MEM_CS;
                writel(val, CORE_CTRL_IO);
@@ -261,7 +271,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
                return 0;
        } else if (flags & SPI_XFER_MMAP_END) {
                writel(~MM_SWITCH, &qslave->base->memswitch);
-#ifdef CONFIG_DRA7XX
+#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
                val = readl(CORE_CTRL_IO);
                val &= MEM_CS_UNSELECT;
                writel(val, CORE_CTRL_IO);
@@ -339,3 +349,26 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 
        return 0;
 }
+
+/* TODO: control from sf layer to here through dm-spi */
+#ifdef CONFIG_TI_EDMA3
+void spi_flash_copy_mmap(void *data, void *offset, size_t len)
+{
+       unsigned int                    addr = (unsigned int) (data);
+       unsigned int                    edma_slot_num = 1;
+
+       /* Invalidate the area, so no writeback into the RAM races with DMA */
+       invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN));
+
+       /* enable edma3 clocks */
+       enable_edma3_clocks();
+
+       /* Call edma3 api to do actual DMA transfer     */
+       edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len);
+
+       /* disable edma3 clocks */
+       disable_edma3_clocks();
+
+       *((unsigned int *)offset) += len;
+}
+#endif