/* ported from ctfb.c (linux kernel):
- * Created in Jan - July 2000 by Thomas Höhenleitner <th@visuelle-maschinen.de>
+ * Created in Jan - July 2000 by Thomas Höhenleitner <th@visuelle-maschinen.de>
*
* Ported to U-Boot:
* (C) Copyright 2002 Denis Peter, MPL AG Switzerland
#include <video_fb.h>
#include "videomodes.h"
-#ifdef CONFIG_VIDEO_CT69000
-
/* debug */
#undef VGA_DEBUG
#undef VGA_DUMP_REG
/* that is the hardware < 69000 we have to manage
+---------+ +-------------------+ +----------------------+ +--+
- | REFCLK |__|NTSC Divisor Select|__|FVCO Reference Divisor|__|÷N|__
- | 14.3MHz | |(NTSCDS) (÷1, ÷5) | |Select (RDS) (÷1, ÷4) | | | |
+ | REFCLK |__|NTSC Divisor Select|__|FVCO Reference Divisor|__|÷N|__
+ | 14.3MHz | |(NTSCDS) (÷1, ÷5) | |Select (RDS) (÷1, ÷4) | | | |
+---------+ +-------------------+ +----------------------+ +--+ |
___________________________________________________________________|
|
| fvco fout
| +--------+ +------------+ +-----+ +-------------------+ +----+
+-| Phase |__|Charge Pump |__| VCO |_____|Post Divisor (PD) |___|CLK |--->
- +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | |
+ +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | |
| +--------+ +------------+ +-----+ | +-------------------+ +----+
| |
| +--+ +---------------+ |
- |____|÷M|___|VCO Loop Divide|__________|
- | | |(VLD)(÷4, ÷16) |
+ |____|÷M|___|VCO Loop Divide|__________|
+ | | |(VLD)(÷4, ÷16) |
+--+ +---------------+
****************************************************************************
that is the hardware >= 69000 we have to manage
+---------+ +--+
- | REFCLK |__|÷N|__
+ | REFCLK |__|÷N|__
| 14.3MHz | | | |
+---------+ +--+ |
__________________|
| fvco fout
| +--------+ +------------+ +-----+ +-------------------+ +----+
+-| Phase |__|Charge Pump |__| VCO |_____|Post Divisor (PD) |___|CLK |--->
- +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | |
+ +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | |
| +--------+ +------------+ +-----+ | +-------------------+ +----+
| |
| +--+ +---------------+ |
- |____|÷M|___|VCO Loop Divide|__________|
- | | |(VLD)(÷1, ÷4) |
+ |____|÷M|___|VCO Loop Divide|__________|
+ | | |(VLD)(÷1, ÷4) |
+--+ +---------------+
pGD->gdfIndex = GDF_24BIT_888RGB;
break;
}
- pGD->isaBase = CFG_ISA_IO_BASE_ADDRESS;
+ pGD->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
pGD->pciBase = pci_mem_base;
pGD->frameAdrs = pci_mem_base;
pGD->memSize = chips_param->max_mem;
out32r (pGD->pciBase + BR08_o, (dim_y << 16) + dim_x); /* start the BITBlt */
video_wait_bitblt (pGD->pciBase + BR04_o);
}
-
-#endif /* CONFIG_CT69000 */
-
#endif /* CONFIG_VIDEO */