am43xx_evm: Update the ramdisk args, we pass things in just fine via DT

[karo-tx-uboot.git] / include / configs / P2020COME.h

diff --git a/include/configs/P2020COME.h b/include/configs/P2020COME.h
index 121e35775312e5b1872bdaae810af7e15f432b6b..d414b84dd21e4ee66a5a1574572122c896f03be6 100644 (file)
--- a/include/configs/P2020COME.h
+++ b/include/configs/P2020COME.h
@@ -1,23 +1,7 @@
 /*
- * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010,2012 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -45,7 +29,6 @@
 /* High Level Configuration Options */
 #define CONFIG_BOOKE           1       /* BOOKE */
 #define CONFIG_E500            1       /* BOOKE e500 family */
-#define CONFIG_MPC85xx         1       /* MPC8540/60/55/41/48/P1020/P2020,etc*/
 #define CONFIG_P2020           1
 #define CONFIG_P2020COME       1
 #define CONFIG_FSL_ELBC                1       /* Enable eLBC Support */
@@ -58,6 +41,7 @@
 #define CONFIG_PCIE3           1       /* PCIE controller 3 (slot 3) */
 
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
+#define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
 #endif /* #if defined(CONFIG_PCI) */
@@ -120,7 +104,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_FSL_DDR3
+#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
 
@@ -201,7 +185,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_NS16550_REG_SIZE    1
 #define CONFIG_SYS_NS16550_CLK         get_bus_freq(0)
 
-#define CONFIG_SERIAL_MULTI    1 /* Enable both serial ports */
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV   /* determine from environment */
 
 #define CONFIG_SYS_BAUDRATE_TABLE   \
@@ -225,16 +208,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_FIT_VERBOSE             1
 
 /* I2C */
-#define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
-#define CONFIG_HARD_I2C                /* I2C with hardware support */
-#undef  CONFIG_SOFT_I2C                /* I2C bit-banged */
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
-#define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address*/
-#define CONFIG_SYS_I2C_SLAVE           0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED       400000
+#define CONFIG_SYS_FSL_I2C_SLAVE       0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET      0x3000
+#define CONFIG_SYS_FSL_I2C2_SPEED      400000
+#define CONFIG_SYS_FSL_I2C2_SLAVE      0x7F
+#define CONFIG_SYS_FSL_I2C2_OFFSET     0x3100
 #define CONFIG_SYS_I2C_NOPROBES                { {0, 0x29} }
-#define CONFIG_SYS_I2C_OFFSET          0x3000
-#define CONFIG_SYS_I2C2_OFFSET         0x3100
 
 /*
  * I2C2 EEPROM
@@ -396,6 +378,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
 #endif /* CONFIG_MMC */
 
+#define CONFIG_HAS_FSL_DR_USB
+#ifdef CONFIG_HAS_FSL_DR_USB
 #define CONFIG_USB_EHCI
 
 #ifdef CONFIG_USB_EHCI
@@ -403,7 +387,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_EHCI_FSL
 #define CONFIG_USB_STORAGE
-#define CONFIG_HAS_FSL_DR_USB
+#endif
 #endif
 
 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI)
@@ -427,7 +411,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING                 /* Command-line editing */
 #define CONFIG_AUTO_COMPLETE   1               /* add autocompletion support */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
-#define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE      1024            /* Console I/O Buffer Size */
 #else
@@ -437,7 +420,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
                                                /* Print Buffer Size */
 #define CONFIG_SYS_MAXARGS     16              /* max number of command args */
 #define CONFIG_SYS_BARGSIZE    CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
-#define CONFIG_SYS_HZ          1000            /* decrementer freq: 1ms tick */
 
 /*
  * For booting Linux, the board info and command line data
@@ -449,7 +431,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
 /*