i2c: zynq: Add support for the second i2c controller

[karo-tx-uboot.git] / include / configs / acadia.h

diff --git a/include/configs/acadia.h b/include/configs/acadia.h
index b71010769f010d3fc49a0eb7fa93d0a3b27d6bc4..5f3b5f936f17d8255c49003d0ba598fcec92aed3 100644 (file)
--- a/include/configs/acadia.h
+++ b/include/configs/acadia.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2007
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /************************************************************************
@@ -32,9 +16,12 @@
  * High Level Configuration Options
  *----------------------------------------------------------------------*/
 #define CONFIG_ACADIA          1               /* Board is Acadia      */
-#define CONFIG_4xx             1               /* ... PPC4xx family    */
 #define CONFIG_405EZ           1               /* Specifc 405EZ support*/
 
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE   0xFFF80000
+#endif
+
 /*
  * Include common defines/options for all AMCC eval boards
  */
@@ -80,15 +67,15 @@
 #define CONFIG_SYS_OCM_DATA_ADDR       0xf8000000
 #define CONFIG_SYS_OCM_DATA_SIZE       0x4000                  /* 16K of onchip SRAM           */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_OCM_DATA_ADDR        /* inside of SRAM               */
-#define CONFIG_SYS_INIT_RAM_END        CONFIG_SYS_OCM_DATA_SIZE        /* End of used area in RAM      */
+#define CONFIG_SYS_INIT_RAM_SIZE       CONFIG_SYS_OCM_DATA_SIZE        /* Size of used area in RAM     */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128                     /* size for initial data        */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
  * Serial Port
  *----------------------------------------------------------------------*/
+#define CONFIG_CONS_INDEX      1       /* Use UART0                    */
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK                     /* external serial clock */
 #define CONFIG_SYS_BASE_BAUD           691200
 
@@ -120,7 +107,13 @@
 #define CONFIG_SYS_FLASH_EMPTY_INFO            /* print 'E' for empty sector on flinfo */
 
 #else
-#define        CONFIG_SYS_NO_FLASH             1       /* No NOR on Acadia when NAND-booting   */
+/*
+ * No NOR-flash on Acadia when NAND-booting. We need to undef the
+ * NOR device-tree fixup code as well, since flash_info is not defined
+ * in this case.
+ */
+#define        CONFIG_SYS_NO_FLASH             1
+#undef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
 #endif
 
 #ifdef CONFIG_ENV_IS_IN_FLASH
@@ -175,9 +168,7 @@
 
 #define CONFIG_SYS_NAND_ECCSIZE        256
 #define CONFIG_SYS_NAND_ECCBYTES       3
-#define CONFIG_SYS_NAND_ECCSTEPS       (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
 #define CONFIG_SYS_NAND_OOBSIZE        16
-#define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
 #define CONFIG_SYS_NAND_ECCPOS         {0, 1, 2, 3, 6, 7}
 
 #ifdef CONFIG_ENV_IS_IN_NAND
@@ -198,7 +189,7 @@
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           400000          /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          400000
 
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0xa8>>1)
@@ -225,7 +216,8 @@
  */
 #define        CONFIG_EXTRA_ENV_SETTINGS                                       \
        CONFIG_AMCC_DEF_ENV                                             \
-       CONFIG_AMCC_DEF_ENV_PPC                                         \
+       CONFIG_AMCC_DEF_ENV_POWERPC                                     \
+       CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
        CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
        CONFIG_AMCC_DEF_ENV_NAND_UPD                                    \
        "kernel_addr=fff10000\0"                                        \
@@ -265,8 +257,6 @@
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS)
 #define CONFIG_SYS_NAND_SELECT_DEVICE  1       /* nand driver supports mutipl. chips   */
 
-#define CONFIG_SYS_64BIT_VSPRINTF      /* needed for nand_util.c */
-
 /*-----------------------------------------------------------------------
  * External Bus Controller (EBC) Setup
  *----------------------------------------------------------------------*/