* Copyright (C) 2011
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define CONFIG_SYS_CONSOLE_INFO_QUIET
/* SoC Configuration */
-#define CONFIG_ARM926EJS /* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
-#define CONFIG_SYS_HZ 1000
-#define CONFIG_SOC_DM365
#define CONFIG_MACH_TYPE MACH_TYPE_DAVINCI_DM365_EVM
#define CONFIG_EMAC_MDIO_PHY_NUM 0
#define CONFIG_SYS_EMAC_TI_CLKDIV 0xa9 /* 1MHz */
#define CONFIG_MII
-#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_RESET_PHY_R
/* I2C */
-#define CONFIG_HARD_I2C
-#define CONFIG_DRIVER_DAVINCI_I2C
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_DAVINCI
+#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
+#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
/* NAND: socketed, two chipselects, normally 2 GBytes */
#define CONFIG_NAND_DAVINCI
/* SPI support */
#define CONFIG_SPI
-#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_DAVINCI_SPI
#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE
#define CONFIG_MMC_MBLOCK
/* U-Boot command configuration */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_BDI
-#undef CONFIG_CMD_FLASH
-#undef CONFIG_CMD_FPGA
-#undef CONFIG_CMD_SETGETDCR
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DHCP
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
/* Defines for SPL */
-#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_STACK (0x00010000 + 0x7f00)
#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE 12320
+/* Provide at least 16MB spacing between us and the Linux Kernel image */
+#define CONFIG_SPL_PAD_TO 12320
+#define CONFIG_SPL_MAX_FOOTPRINT 12288
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_TEXT_BASE 0x81080000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#define CONFIG_SYS_NAND_ECCSIZE 0x200
#define CONFIG_SYS_NAND_ECCBYTES 10
+#define CONFIG_SYS_NAND_MAX_OOBFREE 2
+#define CONFIG_SYS_NAND_MAX_ECCPOS 56
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/*
* Default environment settings
*/
-#define xstr(s) str(s)
-#define str(s) #s
#define DVN4XX_UBOOT_ADDR_R_RAM 0x80000000
/* (DVN4XX_UBOOT_ADDR_R_RAM + CONFIG_SYS_NAND_PAGE_SIZE) */
#define DVN4XX_UBOOT_ADDR_R_UBOOT 0x80003800
#define CONFIG_EXTRA_ENV_SETTINGS \
- "u_boot_addr_r=" xstr(DVN4XX_UBOOT_ADDR_R_RAM) "\0" \
- "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.ubl\0" \
+ "u_boot_addr_r=" __stringify(DVN4XX_UBOOT_ADDR_R_RAM) "\0" \
+ "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.ubl\0" \
"load=tftp ${u_boot_addr_r} ${u-boot}\0" \
- "pagesz=" xstr(CONFIG_SYS_NAND_PAGE_SIZE) "\0" \
+ "pagesz=" __stringify(CONFIG_SYS_NAND_PAGE_SIZE) "\0" \
"writeheader=nandrbl rbl;nand erase 20000 ${pagesz};" \
"nand write ${u_boot_addr_r} 20000 ${pagesz};" \
"nandrbl uboot\0" \
"writenand_spl=nandrbl rbl;nand erase 0 3000;" \
- "nand write " xstr(DVN4XX_UBOOT_ADDR_R_NAND_SPL) \
+ "nand write " __stringify(DVN4XX_UBOOT_ADDR_R_NAND_SPL) \
" 0 3000;nandrbl uboot\0" \
"writeuboot=nandrbl uboot;" \
- "nand erase " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
- xstr(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \
- ";nand write " xstr(DVN4XX_UBOOT_ADDR_R_UBOOT) \
- " " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
- xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
+ "nand erase " __stringify(CONFIG_SYS_NAND_U_BOOT_OFFS) " "\
+ __stringify(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \
+ ";nand write " __stringify(DVN4XX_UBOOT_ADDR_R_UBOOT) \
+ " " __stringify(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
+ __stringify(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
"update=run load writenand_spl writeuboot\0" \
"bootcmd=run net_nfs\0" \
"rootpath=/opt/eldk-arm/arm\0" \
"rootpath=/opt/eldk-arm/arm\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
- "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage \0" \
+ "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage \0" \
"kernel_addr_r=80600000\0" \
"load_kernel=tftp ${kernel_addr_r} ${bootfile}\0" \
- "ubi_load_kernel=ubi part ubi 2048;ubifsmount ${img_volume};" \
+ "ubi_load_kernel=ubi part ubi 2048;ubifsmount ubi:${img_volume};" \
"ubifsload ${kernel_addr_r} boot/uImage\0" \
- "fit_addr_r=" xstr(CONFIG_BOARD_IMG_ADDR_R) "\0" \
- "img_addr_r=" xstr(CONFIG_BOARD_IMG_ADDR_R) "\0" \
- "img_file=" xstr(CONFIG_HOSTNAME) "/ait.itb\0" \
+ "fit_addr_r=" __stringify(CONFIG_BOARD_IMG_ADDR_R) "\0" \
+ "img_addr_r=" __stringify(CONFIG_BOARD_IMG_ADDR_R) "\0" \
+ "img_file=" __stringify(CONFIG_HOSTNAME) "/ait.itb\0" \
"header_addr=20000\0" \
"img_writeheader=nandrbl rbl;" \
"nand erase ${header_addr} ${pagesz};" \
"img_writespl=nandrbl rbl;nand erase 0 3000;" \
"nand write ${img_addr_r} 0 3000;nandrbl uboot\0" \
"img_writeuboot=nandrbl uboot;" \
- "nand erase " xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
- xstr(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \
+ "nand erase " __stringify(CONFIG_SYS_NAND_U_BOOT_OFFS) " "\
+ __stringify(CONFIG_SYS_NAND_U_BOOT_ERA_SIZE) \
";nand write ${img_addr_r} " \
- xstr(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
- xstr(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
+ __stringify(CONFIG_SYS_NAND_U_BOOT_OFFS) " " \
+ __stringify(CONFIG_SYS_NAND_U_BOOT_SIZE) "\0" \
"img_writedfenv=ubi part ubi 2048;" \
"ubi write ${img_addr_r} default ${filesize}\0" \
"img_volume=rootfs1\0" \