]> git.kernelconcepts.de Git - karo-tx-uboot.git/blobdiff - include/configs/csb226.h
PXA: csb226: Fix for reloc
[karo-tx-uboot.git] / include / configs / csb226.h
index 15635288e38d254da55ca9c7c2b2dd42f7e12683..72e47ce7a848af0a2a6adcba64395b40ea1afcd0 100644 (file)
 
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff      */
                                        /* for timer/console/ethernet       */
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+#define        CONFIG_SYS_TEXT_BASE    0x0
 /*
  * Hardware drivers
  */
@@ -49,6 +53,7 @@
 /*
  * select serial console configuration
  */
+#define CONFIG_PXA_SERIAL
 #define CONFIG_FFUART          1       /* we use FFUART on CSB226          */
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_SYS_MEMTEST_START       0xa0400000      /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0xa0800000      /* 4 ... 8 MB in DRAM   */
 
-#undef  CONFIG_SYS_CLKS_IN_HZ          /* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR           0xa3000000      /* default load address */
                                                /* RS: where is this documented? */
                                                /* RS: is this where U-Boot is  */
                                                /* RS: relocated to in RAM?      */
 
-#define CONFIG_SYS_HZ                  3686400         /* incrementer freq: 3.6864 MHz */
+#define CONFIG_SYS_HZ                  1000
                                                /* RS: the oscillator is actually 3680130?? */
 #define CONFIG_SYS_CPUSPEED            0x141           /* set core clock to 200/200/100 MHz */
                                                /* 0101000001 */
 /*
  * Network chip
  */
-#define CONFIG_DRIVER_CS8900   1
-#define CS8900_BUS32           1
-#define CS8900_BASE            0x08000000
+#define CONFIG_NET_MULTI
+#define CONFIG_CS8900
+#define CONFIG_CS8900_BUS32
+#define CONFIG_CS8900_BASE     0x08000000
 
 /*
  * Stack sizes
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 # if 0
 /* FIXME: switch to _documented_ registers */
 /*
 
 #define CONFIG_SYS_PSSR_VAL        0x20
 
+#define        CONFIG_SYS_CCCR                 CCCR_L27|CCCR_M2|CCCR_N10
+#define        CONFIG_SYS_CKEN                 0x0
+
 /*
  * Memory settings
  */
 #define CONFIG_SYS_MDCNFG_VAL          0x09a909a9
 #define CONFIG_SYS_MDREFR_VAL          0x038ff030
 #define CONFIG_SYS_MDMRS_VAL           0x00220022
+#define        CONFIG_SYS_FLYCNFG_VAL          0x00000000
+#define        CONFIG_SYS_SXCNFG_VAL           0x00000000
 
 /*
  * PCMCIA and CF Interfaces