#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_440SPE 1 /* Specifc SPe support */
+#define CONFIG_440SPE_REVA 1 /* Support old Rev A. */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
#define CONFIG_SYS_4xx_RESET_TYPE 0x2 /* use chip reset on this board */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
+/* I2C bootstrap EEPROM */
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR 0x50
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET 0
+#define CONFIG_4xx_CONFIG_BLOCKSIZE 8
+
/* I2C RTC */
#define CONFIG_RTC_M41T11 1
#define CONFIG_SYS_RTC_BUS_NUM 1 /* The I2C bus for RTC */
/*
* Commands additional to the ones defined in amcc-common.h
*/
-#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
#define CONFIG_CMD_PCI
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_SNTP