Merge branch 'master' of git://git.denx.de/u-boot-microblaze

[karo-tx-uboot.git] / include / configs / mx1ads.h

diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h
index f136b0ca8c6e2b8487edfcdaa3086c609265b1e2..9c1b255e65c65776beb9a5e581c2be3e1e1f32a4 100644 (file)
--- a/include/configs/mx1ads.h
+++ b/include/configs/mx1ads.h
@@ -40,11 +40,12 @@
 /*
  * Select serial console configuration
   */
+#define CONFIG_IMX_SERIAL
 #define CONFIG_IMX_SERIAL1             /* internal uart 1 */
 /* #define _CONFIG_UART2 */            /* internal uart 2 */
 /* #define CONFIG_SILENT_CONSOLE */    /* use this to disable output */
 
-#define BOARD_LATE_INIT                1
+#define CONFIG_BOARD_LATE_INIT
 #define USE_920T_MMU           1
 
 #if 0
@@ -59,15 +60,12 @@
 
 #define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 128*1024)
 
-
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-
 /*
  *  CS8900 Ethernet drivers
  */
-#define CONFIG_DRIVER_CS8900   1       /* we have a CS8900 on-board */
-#define CS8900_BASE            0x15000300
-#define CS8900_BUS16           1       /* the Linux driver does accesses as shorts */
+#define CONFIG_CS8900          /* we have a CS8900 on-board */
+#define CONFIG_CS8900_BASE     0x15000300
+#define CONFIG_CS8900_BUS16    /* the Linux driver does accesses as shorts */
 
 /*
  * select serial console configuration
@@ -78,7 +76,6 @@
 
 #define CONFIG_BAUDRATE                115200
 
-
 /*
  * BOOTP options
  */
@@ -87,7 +84,6 @@
 #define CONFIG_BOOTP_GATEWAY
 #define CONFIG_BOOTP_HOSTNAME
 
-
 /*
  * Command line configuration.
  */
@@ -97,7 +93,6 @@
 #define CONFIG_CMD_REGINFO
 #define CONFIG_CMD_ELF
 
-
 #define CONFIG_BOOTDELAY       3
 #define CONFIG_BOOTARGS                "root=/dev/msdk mem=48M"
 #define CONFIG_BOOTFILE                "mx1ads"
@@ -133,7 +128,6 @@
 #define CONFIG_SYS_MEMTEST_START       0x09000000      /* memtest works on     */
 #define CONFIG_SYS_MEMTEST_END         0x0AF00000      /* 63 MB in DRAM        */
 
-#undef CONFIG_SYS_CLKS_IN_HZ                           /* everything, incl board info, in Hz */
 #define CONFIG_SYS_LOAD_ADDR           0x08800000      /* default load address */
 /*#define      CONFIG_SYS_HZ                   1000 */
 #define CONFIG_SYS_HZ                  3686400
@@ -161,6 +155,16 @@
 #define PHYS_SDRAM_1           0x08000000      /* SDRAM  on CSD0               */
 #define PHYS_SDRAM_1_SIZE      0x04000000      /* 64 MB                        */
 
+#define CONFIG_SYS_TEXT_BASE   0x10000000
+
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR       0x00300000
+#define CONFIG_SYS_INIT_RAM_SIZE       0x000FFFFF
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - \
+                                               GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_INIT_RAM_ADDR + \
+                                               CONFIG_SYS_GBL_DATA_OFFSET)
+
 #define CONFIG_SYS_MAX_FLASH_BANKS     1               /* 1 bank of SyncFlash          */
 #define CONFIG_SYS_FLASH_BASE          0x0C000000      /* SyncFlash on CSD1            */
 #define FLASH_BANK_SIZE                0x01000000      /* 16 MB Total                  */