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index a1a849e292c25312b13e4b844397878b26cb6454..076dd5a8afaa5b08b81107fb0560486f0baa3274 100644 (file)
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
-#include <asm/sizes.h>
 
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMCORTEXA8     1       /* This is an ARM V7 CPU core */
+#define CONFIG_ARMV7           1       /* This is an ARM V7 CPU core */
 #define CONFIG_OMAP            1       /* in a TI OMAP core */
 #define CONFIG_OMAP34XX                1       /* which is a 34XX */
 #define CONFIG_OMAP3430                1       /* which is in a 3430 */
 #define CONFIG_OMAP3_BEAGLE    1       /* working with BEAGLE */
 
+#define CONFIG_SDRC    /* The chip has SDRC controller */
+
 #include <asm/arch/cpu.h>              /* get chip and board defs */
 #include <asm/arch/omap3.h>
 
 #undef CONFIG_USE_IRQ                          /* no support for IRQs */
 #define CONFIG_MISC_INIT_R
 
+#define CONFIG_OF_LIBFDT               1
+/*
+ * The early kernel mapping on ARM currently only maps from the base of DRAM
+ * to the end of the kernel image.  The kernel is loaded at DRAM base + 0x8000.
+ * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000,
+ * so that leaves DRAM base to DRAM base + 0x4000 available.
+ */
+#define CONFIG_SYS_BOOTMAPSZ           0x4000
+
 #define CONFIG_CMDLINE_TAG             1       /* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS       1
 #define CONFIG_INITRD_TAG              1
 /*
  * Size of malloc() pool
  */
-#define CONFIG_ENV_SIZE                        SZ_128K /* Total Size Environment */
+#define CONFIG_ENV_SIZE                        (128 << 10)     /* 128 KiB */
                                                /* Sector */
-#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + SZ_128K)
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* bytes reserved for */
+#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (128 << 10))
                                                /* initial data */
 
 /*
 #define CONFIG_BAUDRATE                        115200
 #define CONFIG_SYS_BAUDRATE_TABLE      {4800, 9600, 19200, 38400, 57600,\
                                        115200}
+#define CONFIG_GENERIC_MMC             1
 #define CONFIG_MMC                     1
-#define CONFIG_OMAP3_MMC               1
+#define CONFIG_OMAP_HSMMC              1
 #define CONFIG_DOS_PARTITION           1
 
+/* DDR - I use Micron DDR */
+#define CONFIG_OMAP3_MICRON_DDR                1
+
+/* USB */
+#define CONFIG_MUSB_UDC                        1
+#define CONFIG_USB_OMAP3               1
+#define CONFIG_TWL4030_USB             1
+
+/* USB device configuration */
+#define CONFIG_USB_DEVICE              1
+#define CONFIG_USB_TTY                 1
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV   1
+
 /* commands to include */
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_EXT2                /* EXT2 Support                 */
 #define CONFIG_CMD_FAT         /* FAT support                  */
 #define CONFIG_CMD_JFFS2       /* JFFS2 Support                */
 #undef CONFIG_CMD_NFS          /* NFS support                  */
 
 #define CONFIG_SYS_NO_FLASH
+#define CONFIG_HARD_I2C                        1
 #define CONFIG_SYS_I2C_SPEED           100000
 #define CONFIG_SYS_I2C_SLAVE           1
 #define CONFIG_SYS_I2C_BUS             0
 #define CONFIG_SYS_I2C_BUS_SELECT      1
+#define CONFIG_I2C_MULTI_BUS           1
 #define CONFIG_DRIVER_OMAP34XX_I2C     1
 
+/*
+ * TWL4030
+ */
+#define CONFIG_TWL4030_POWER           1
+#define CONFIG_TWL4030_LED             1
+
 /*
  * Board NAND Info.
  */
+#define CONFIG_SYS_NAND_QUIET_TEST     1
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR           NAND_BASE       /* physical address */
                                                        /* to access nand */
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
-#define CONFIG_SYS_64BIT_VSPRINTF              /* needed for nand_util.c */
-
 #define CONFIG_JFFS2_NAND
 /* nand device jffs2 lives on */
 #define CONFIG_JFFS2_DEV               "nand0"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "loadaddr=0x82000000\0" \
+       "usbtty=cdc_acm\0" \
        "console=ttyS2,115200n8\0" \
-       "videomode=1024x768@60,vxres=1024,vyres=768\0" \
-       "videospec=omapfb:vram:2M,vram:4M\0" \
+       "mpurate=500\0" \
+       "vram=12M\0" \
+       "dvimode=1024x768MR-16@60\0" \
+       "defaultdisplay=dvi\0" \
+       "mmcdev=0\0" \
+       "mmcroot=/dev/mmcblk0p2 rw\0" \
+       "mmcrootfstype=ext3 rootwait\0" \
+       "nandroot=/dev/mtdblock4 rw\0" \
+       "nandrootfstype=jffs2\0" \
        "mmcargs=setenv bootargs console=${console} " \
-               "video=${videospec},mode:${videomode} " \
-               "root=/dev/mmcblk0p2 rw " \
-               "rootfstype=ext3 rootwait\0" \
+               "mpurate=${mpurate} " \
+               "vram=${vram} " \
+               "omapfb.mode=dvi:${dvimode} " \
+               "omapfb.debug=y " \
+               "omapdss.def_disp=${defaultdisplay} " \
+               "root=${mmcroot} " \
+               "rootfstype=${mmcrootfstype}\0" \
        "nandargs=setenv bootargs console=${console} " \
-               "video=${videospec},mode:${videomode} " \
-               "root=/dev/mtdblock4 rw " \
-               "rootfstype=jffs2\0" \
-       "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
+               "mpurate=${mpurate} " \
+               "vram=${vram} " \
+               "omapfb.mode=dvi:${dvimode} " \
+               "omapfb.debug=y " \
+               "omapdss.def_disp=${defaultdisplay} " \
+               "root=${nandroot} " \
+               "rootfstype=${nandrootfstype}\0" \
+       "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
        "bootscript=echo Running bootscript from mmc ...; " \
                "source ${loadaddr}\0" \
-       "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
+       "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
        "mmcboot=echo Booting from mmc ...; " \
                "run mmcargs; " \
                "bootm ${loadaddr}\0" \
                "bootm ${loadaddr}\0" \
 
 #define CONFIG_BOOTCOMMAND \
-       "if mmc init; then " \
+       "if mmc rescan ${mmcdev}; then " \
                "if run loadbootscript; then " \
                        "run bootscript; " \
                "else " \
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT                       "OMAP3 beagleboard.org # "
-
 #define CONFIG_SYS_LONGHELP            /* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER         /* use "hush" command parser */
 #define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
-#define CONFIG_SYS_PROMPT              V_PROMPT
+#define CONFIG_SYS_PROMPT              "OMAP3 beagleboard.org # "
 #define CONFIG_SYS_CBSIZE              256     /* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
  *
  * The stack sizes are set up in start.S using the settings below
  */
-#define CONFIG_STACKSIZE       SZ_128K /* regular stack */
+#define CONFIG_STACKSIZE       (128 << 10)     /* regular stack 128 KiB */
 #ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ   SZ_4K   /* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ   SZ_4K   /* FIQ stack */
+#define CONFIG_STACKSIZE_IRQ   (4 << 10)       /* IRQ stack 4 KiB */
+#define CONFIG_STACKSIZE_FIQ   (4 << 10)       /* FIQ stack 4 KiB */
 #endif
 
 /*-----------------------------------------------------------------------
  */
 #define CONFIG_NR_DRAM_BANKS   2       /* CS1 may or may not be populated */
 #define PHYS_SDRAM_1           OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE      SZ_32M  /* at least 32 meg */
+#define PHYS_SDRAM_1_SIZE      (32 << 20)      /* at least 32 MiB */
 #define PHYS_SDRAM_2           OMAP34XX_SDRC_CS1
 
 /* SDRAM Bank Allocation method */
 #define CONFIG_SYS_MAX_FLASH_SECT      520     /* max number of sectors on */
                                                /* one chip */
 #define CONFIG_SYS_MAX_FLASH_BANKS     2       /* max number of flash banks */
-#define CONFIG_SYS_MONITOR_LEN         SZ_256K /* Reserve 2 sectors */
+#define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
 
 #define CONFIG_SYS_FLASH_BASE          boot_flash_base
 
 #define CONFIG_SYS_JFFS2_NUM_BANKS     1
 
 #ifndef __ASSEMBLY__
-extern gpmc_csx_t *nand_cs_base;
-extern gpmc_t *gpmc_cfg_base;
 extern unsigned int boot_flash_base;
 extern volatile unsigned int boot_flash_env_addr;
 extern unsigned int boot_flash_off;
@@ -303,4 +346,11 @@ extern unsigned int boot_flash_sec;
 extern unsigned int boot_flash_type;
 #endif
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR       0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE       0x800
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - \
+                                        GENERATED_GBL_DATA_SIZE)
+
 #endif /* __CONFIG_H */