powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641

[karo-tx-uboot.git] / include / configs / sbc8641d.h

diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index 6662bbe0e54c2a70306784eed86e9dc5d703b8f6..618513ab66b8e8baee64b5753ca1c9d0d1eab062 100644 (file)
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -56,8 +56,8 @@
 #define CONFIG_SYS_SCRATCH_VA  0xe8000000
 
 #define CONFIG_PCI             1       /* Enable PCIE */
-#define CONFIG_PCI1            1       /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCI2            1       /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE1           1       /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE2           1       /* PCIE controler 2 (slot 2) */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_FSL_LAW         1       /* Use common FSL init code */
 
@@ -304,23 +304,23 @@
  * General PCI
  * Addresses are mapped 1-1.
  */
-#define CONFIG_SYS_PCI1_MEM_BUS                0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS       CONFIG_SYS_PCI1_MEM_BUS
-#define CONFIG_SYS_PCI1_MEM_VIRT       CONFIG_SYS_PCI1_MEM_BUS
-#define CONFIG_SYS_PCI1_MEM_SIZE       0x20000000      /* 512M */
-#define CONFIG_SYS_PCI1_IO_BUS 0xe2000000
-#define CONFIG_SYS_PCI1_IO_PHYS        CONFIG_SYS_PCI1_IO_BUS
-#define CONFIG_SYS_PCI1_IO_VIRT        CONFIG_SYS_PCI1_IO_BUS
-#define CONFIG_SYS_PCI1_IO_SIZE        0x1000000       /* 16M */
-
-#define CONFIG_SYS_PCI2_MEM_BUS        0xa0000000
-#define CONFIG_SYS_PCI2_MEM_PHYS       CONFIG_SYS_PCI2_MEM_BUS
-#define CONFIG_SYS_PCI2_MEM_VIRT       CONFIG_SYS_PCI2_MEM_BUS
-#define CONFIG_SYS_PCI2_MEM_SIZE       0x10000000      /* 256M */
-#define CONFIG_SYS_PCI2_IO_BUS 0xe3000000
-#define CONFIG_SYS_PCI2_IO_PHYS        CONFIG_SYS_PCI2_IO_BUS
-#define CONFIG_SYS_PCI2_IO_VIRT        CONFIG_SYS_PCI2_IO_BUS
-#define CONFIG_SYS_PCI2_IO_SIZE        0x1000000       /* 16M */
+#define CONFIG_SYS_PCIE1_MEM_BUS       0x80000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS      CONFIG_SYS_PCIE1_MEM_BUS
+#define CONFIG_SYS_PCIE1_MEM_VIRT      CONFIG_SYS_PCIE1_MEM_BUS
+#define CONFIG_SYS_PCIE1_MEM_SIZE      0x20000000      /* 512M */
+#define CONFIG_SYS_PCIE1_IO_BUS                0xe2000000
+#define CONFIG_SYS_PCIE1_IO_PHYS       CONFIG_SYS_PCIE1_IO_BUS
+#define CONFIG_SYS_PCIE1_IO_VIRT       CONFIG_SYS_PCIE1_IO_BUS
+#define CONFIG_SYS_PCIE1_IO_SIZE       0x1000000       /* 16M */
+
+#define CONFIG_SYS_PCIE2_MEM_BUS       0xa0000000
+#define CONFIG_SYS_PCIE2_MEM_PHYS      CONFIG_SYS_PCIE2_MEM_BUS
+#define CONFIG_SYS_PCIE2_MEM_VIRT      CONFIG_SYS_PCIE2_MEM_BUS
+#define CONFIG_SYS_PCIE2_MEM_SIZE      0x10000000      /* 256M */
+#define CONFIG_SYS_PCIE2_IO_BUS                0xe3000000
+#define CONFIG_SYS_PCIE2_IO_PHYS       CONFIG_SYS_PCIE2_IO_BUS
+#define CONFIG_SYS_PCIE2_IO_VIRT       CONFIG_SYS_PCIE2_IO_BUS
+#define CONFIG_SYS_PCIE2_IO_SIZE       0x1000000       /* 16M */
 
 #if defined(CONFIG_PCI)
 
@@ -406,10 +406,10 @@
  * 0xa000_0000  512M   PCI-Express 2 Memory
  *     Changed it for operating from 0xd0000000
  */
-#define CONFIG_SYS_DBAT1L      ( CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW \
+#define CONFIG_SYS_DBAT1L      ( CONFIG_SYS_PCIE1_MEM_PHYS | BATL_PP_RW \
                        | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT1U      (CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT1L      (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CONFIG_SYS_DBAT1U      (CONFIG_SYS_PCIE1_MEM_VIRT | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT1L      (CONFIG_SYS_PCIE1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CONFIG_SYS_IBAT1U      CONFIG_SYS_DBAT1U
 
 /*
@@ -449,10 +449,10 @@
  * 0xe300_0000  16M    PCI-Express 2 I/0
  *    Note that this is at 0xe0000000
  */
-#define CONFIG_SYS_DBAT4L      ( CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW \
+#define CONFIG_SYS_DBAT4L      ( CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW \
                        | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT4U      (CONFIG_SYS_PCI1_IO_VIRT | BATU_BL_32M | BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT4L      (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CONFIG_SYS_DBAT4U      (CONFIG_SYS_PCIE1_IO_VIRT | BATU_BL_32M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT4L      (CONFIG_SYS_PCIE1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
 #define CONFIG_SYS_IBAT4U      CONFIG_SYS_DBAT4U
 
 /*