EXYNOS5: Enable SPI booting.

[karo-tx-uboot.git] / include / configs / sh7757lcr.h

diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index 9799767c5e9c6d3fa0da77b5a108988b52e44052..d5c7b7215ea263c10f511b3d253753c038c55499 100644 (file)
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -31,15 +31,16 @@
 #define CONFIG_SH_32BIT                1
 #define CONFIG_CPU_SH7757      1
 #define CONFIG_SH7757LCR       1
+#define CONFIG_SH7757LCR_DDR_ECC       1
 
 #define CONFIG_SYS_TEXT_BASE   0x8ef80000
 #define CONFIG_SYS_LDSCRIPT    "board/renesas/sh7757lcr/u-boot.lds"
 
 #define CONFIG_CMD_MEMORY
 #define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_NFS
-#define CONFIG_CMD_DFL
 #define CONFIG_CMD_SDRAM
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_RUN
@@ -47,6 +48,10 @@
 #define CONFIG_CMD_MD5SUM
 #define CONFIG_MD5
 #define CONFIG_CMD_LOADS
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_DOS_PARTITION
+#define CONFIG_MAC_PARTITION
 
 #define CONFIG_BAUDRATE                115200
 #define CONFIG_BOOTDELAY       3
@@ -97,18 +102,21 @@
 #define CONFIG_SYS_NO_FLASH
 
 /* Ether */
-#define CONFIG_NET_MULTI               1
 #define CONFIG_SH_ETHER                        1
 #define CONFIG_SH_ETHER_USE_PORT       0
 #define CONFIG_SH_ETHER_PHY_ADDR       1
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK        1
+#define CONFIG_PHYLIB
+#define CONFIG_BITBANGMII
+#define CONFIG_BITBANGMII_MULTI
+#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
 
 #define SH7757LCR_ETHERNET_MAC_BASE_SPI        0x000b0000
 #define SH7757LCR_SPI_SECTOR_SIZE      (64 * 1024)
 #define SH7757LCR_ETHERNET_MAC_BASE    SH7757LCR_ETHERNET_MAC_BASE_SPI
 #define SH7757LCR_ETHERNET_MAC_SIZE    17
 #define SH7757LCR_ETHERNET_NUM_CH      2
-#define BOARD_LATE_INIT                        1
+#define CONFIG_BOARD_LATE_INIT
 
 /* Gigabit Ether */
 #define SH7757LCR_GIGA_ETHERNET_NUM_CH 2
@@ -119,6 +127,13 @@
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO       1
 
+/* MMCIF */
+#define CONFIG_MMC                     1
+#define CONFIG_GENERIC_MMC             1
+#define CONFIG_SH_MMCIF                        1
+#define CONFIG_SH_MMCIF_ADDR           0xffcb0000
+#define CONFIG_SH_MMCIF_CLK            48000000
+
 /* SH7757 board */
 #define SH7757LCR_SDRAM_PHYS_TOP       0x40000000
 #define SH7757LCR_GRA_OFFSET           0x1f000000