xilinx: zynq: Enable DCC and create new zynq_dcc board

[karo-tx-uboot.git] / include / configs / stxgp3.h

diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index ae6f45aeecde44f4febaf438ee6c69ee07cd8005..939a964e7f94ab29470f43e22e875aa4a2edfd8e 100644 (file)
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -43,6 +43,8 @@
 #define CONFIG_STXGP3          1       /* Silicon Tx GPPP board specific*/
 #define CONFIG_MPC8560         1
 
+#define        CONFIG_SYS_TEXT_BASE    0xfff80000
+
 #undef  CONFIG_PCI                     /* pci ethernet support */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support*/
 #undef  CONFIG_ETHER_ON_FCC             /* cpm FCC ethernet support */
@@ -66,6 +68,7 @@
 #define  CONFIG_BTB                          /* toggle branch predition */
 
 #define CONFIG_BOARD_EARLY_INIT_F   1        /* Call board_pre_init      */
+#define CONFIG_RESET_PHY_R     1       /* Call reset_phy()             */
 
 #undef  CONFIG_SYS_DRAM_TEST                       /* memory test, takes time  */
 #define CONFIG_SYS_MEMTEST_START       0x00200000  /* memtest region */
@@ -96,7 +99,7 @@
 #define CONFIG_SYS_OR1_PRELIM          0xffff0ff7      /* 64K is enough */
 #define CONFIG_SYS_LBC_LCLDEVS_BASE    0xfc000000      /* Base of localbus devices */
 
-#define CONFIG_SYS_MONITOR_BASE        TEXT_BASE       /* start of monitor     */
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor     */
 
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #define CONFIG_SYS_RAMBOOT
@@ -106,12 +109,9 @@
 
 #ifdef CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_CCSRBAR_DEFAULT     0x40000000      /* CCSRBAR by BDI cfg   */
-#else
-#define CONFIG_SYS_CCSRBAR_DEFAULT     0xff700000      /* CCSRBAR Default      */
 #endif
-#define CONFIG_SYS_CCSRBAR             0xfdf00000      /* relocated CCSRBAR    */
-#define CONFIG_SYS_CCSRBAR_PHYS        CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
-#define CONFIG_SYS_IMMR                CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR    */
+#define CONFIG_SYS_CCSRBAR             0xfdf00000
+#define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
 #define CONFIG_FSL_DDR1
@@ -120,7 +120,7 @@
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
 #undef  CONFIG_DDR_ECC                 /* only for ECC DDR module */
-#define CONFIG_DDR_DLL                  /* possible DLL fix needed */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING           /* Sets the 2T timing bit */
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef
@@ -152,10 +152,9 @@
 
 #define CONFIG_SYS_INIT_RAM_LOCK       1
 #define CONFIG_SYS_INIT_RAM_ADDR       0x60000000      /* Initial RAM address  */
-#define CONFIG_SYS_INIT_RAM_END        0x4000          /* End of used area in RAM */
+#define CONFIG_SYS_INIT_RAM_SIZE       0x4000          /* Size of used area in RAM */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128             /* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN         (256 * 1024)    /* Reserve 256 kB for Mon */
@@ -174,7 +173,6 @@
 /* Use the HUSH parser */
 #define CONFIG_SYS_HUSH_PARSER
 #ifdef  CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
 #endif
 
 /*
@@ -210,7 +208,6 @@
 
 #if defined(CONFIG_PCI)                        /* PCI Ethernet card */
 
-#define CONFIG_NET_MULTI
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 
 #undef CONFIG_EEPRO100
@@ -229,10 +226,6 @@
 
 #if defined(CONFIG_TSEC_ENET)
 
-#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI       1
-#endif
-
 #define CONFIG_MII             1       /* MII PHY management           */
 
 #define CONFIG_TSEC1   1
@@ -261,8 +254,8 @@
    * - Select bus for bd/buffers
    * - Full duplex
    */
-  #define CONFIG_SYS_CMXFCR_MASK       (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
-  #define CONFIG_SYS_CMXFCR_VALUE      (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
+  #define CONFIG_SYS_CMXFCR_MASK2      (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
+  #define CONFIG_SYS_CMXFCR_VALUE2     (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
   #define CONFIG_SYS_CPMFCR_RAMTYPE    0
 #if 0
   #define CONFIG_SYS_FCC_PSMR          (FCC_PSMR_FDE)
@@ -320,9 +313,10 @@
 
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_I2C
+#define CONFIG_CMD_REGINFO
 
 #if defined(CONFIG_SYS_RAMBOOT)
-    #undef CONFIG_CMD_ENV
+    #undef CONFIG_CMD_SAVEENV
     #undef CONFIG_CMD_LOADS
 #else
     #define CONFIG_CMD_ELF
@@ -362,14 +356,6 @@
  */
 #define CONFIG_SYS_BOOTMAPSZ           (8 << 20) /* Initial Memory map for Linux */
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD  0x01            /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM  0x02            /* Software reboot              */
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
@@ -390,8 +376,8 @@
 #define CONFIG_GATEWAYIP       192.168.85.1
 #define CONFIG_NETMASK         255.255.255.0
 #define CONFIG_HOSTNAME                STX_GP3
-#define CONFIG_ROOTPATH                /gppproot
-#define CONFIG_BOOTFILE                uImage
+#define CONFIG_ROOTPATH                "/gppproot"
+#define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_LOADADDR                0x1000000
 
 #endif /* __CONFIG_H */