EXYNOS5: Change parent clock of FIMD to MPLL

[karo-tx-uboot.git] / include / fdtdec.h

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 5164ce24e61e2686ae6fb664862dfc8363a4238f..f77d195630bc088a6d2c82d62f2ee6e3ebb24162 100644 (file)
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -68,6 +68,17 @@ enum fdt_compat_id {
        COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */
        COMPAT_NVIDIA_TEGRA20_KBC,      /* Tegra20 Keyboard */
        COMPAT_NVIDIA_TEGRA20_NAND,     /* Tegra2 NAND controller */
+       COMPAT_NVIDIA_TEGRA20_PWM,      /* Tegra 2 PWM controller */
+       COMPAT_NVIDIA_TEGRA20_DC,       /* Tegra 2 Display controller */
+       COMPAT_SMSC_LAN9215,            /* SMSC 10/100 Ethernet LAN9215 */
+       COMPAT_SAMSUNG_EXYNOS5_SROMC,   /* Exynos5 SROMC */
+       COMPAT_SAMSUNG_S3C2440_I2C,     /* Exynos I2C Controller */
+       COMPAT_SAMSUNG_EXYNOS5_SOUND,   /* Exynos Sound */
+       COMPAT_WOLFSON_WM8994_CODEC,    /* Wolfson WM8994 Sound Codec */
+       COMPAT_SAMSUNG_EXYNOS_SPI,      /* Exynos SPI */
+       COMPAT_SAMSUNG_EXYNOS_EHCI,     /* Exynos EHCI controller */
+       COMPAT_SAMSUNG_EXYNOS_USB_PHY,  /* Exynos phy controller for usb2.0 */
+       COMPAT_MAXIM_MAX77686_PMIC,     /* MAX77686 PMIC */
 
        COMPAT_COUNT,
 };