} mem_dp_fg_sync;
} ipu_channel_params_t;
+/*
+ * Enumeration of IPU interrupts.
+ */
+enum ipu_irq_line {
+ IPU_IRQ_DP_SF_END = 448 + 3,
+ IPU_IRQ_DC_FC_1 = 448 + 9,
+};
+
/*
* Bitfield of Display Interface signal polarities.
*/
unsigned int interface_pix_fmt,
ipu_di_clk_parent_t di_clk_parent,
unsigned long di_clk_val, int bpp);
+void ipuv3_fb_shutdown(void);
int32_t ipu_init_channel(ipu_channel_t channel, ipu_channel_params_t *params);
void ipu_uninit_channel(ipu_channel_t channel);
void ipu_dp_uninit(ipu_channel_t channel);
void ipu_dp_dc_disable(ipu_channel_t channel, unsigned char swap);
ipu_color_space_t format_to_colorspace(uint32_t fmt);
-
-#endif /* __IPU_H */
+#endif