EXYNOS5: Change parent clock of FIMD to MPLL

[karo-tx-uboot.git] / include / netdev.h

diff --git a/include/netdev.h b/include/netdev.h
index b0c21d5336fbef0e024f0e51c146929662edf11a..b8d303d0895b24dd90607baced372568159282c0 100644 (file)
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -52,7 +52,7 @@ int calxedaxgmac_initialize(u32 id, ulong base_addr);
 int cs8900_initialize(u8 dev_num, int base_addr);
 int davinci_emac_initialize(void);
 int dc21x4x_initialize(bd_t *bis);
-int designware_initialize(u32 id, ulong base_addr, u32 phy_addr);
+int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface);
 int dm9000_initialize(bd_t *bis);
 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
 int e1000_initialize(bd_t *bis);
@@ -102,6 +102,18 @@ int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
                                                        unsigned long dma_addr);
 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
                                                        int txpp, int rxpp);
+int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
+                                               unsigned long ctrl_addr);
+int zynq_gem_initialize(bd_t *bis, int base_addr);
+/*
+ * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
+ * exported by a public hader file, we need a global definition at this point.
+ */
+#if defined(CONFIG_XILINX_LL_TEMAC)
+#define XILINX_LL_TEMAC_M_FIFO         0       /* use FIFO Ctrl */
+#define XILINX_LL_TEMAC_M_SDMA_PLB     (1 << 0)/* use SDMA Ctrl via PLB */
+#define XILINX_LL_TEMAC_M_SDMA_DCR     (1 << 1)/* use SDMA Ctrl via DCR */
+#endif
 
 /* Boards with PCI network controllers can call this from their board_eth_init()
  * function to initialize whatever's on board.