ppc/85xx: Simplify the top makefile for 36-bit config for MPC8572DS

[karo-tx-uboot.git] / include / spartan2.h

diff --git a/include/spartan2.h b/include/spartan2.h
index 42806e3ae2c06696e3e25b3fb2d06899f458360e..7327857c1200d00ee7ff3390eeb16e0bdc709be4 100644 (file)
--- a/include/spartan2.h
+++ b/include/spartan2.h
@@ -47,26 +47,37 @@ typedef struct {
        Xilinx_busy_fn  busy;
        Xilinx_abort_fn abort;
        Xilinx_post_fn  post;
-       int             relocated;
+       int             relocated;
 } Xilinx_Spartan2_Slave_Parallel_fns;
 
 /* Slave Serial Implementation function table */
 typedef struct {
+       Xilinx_pre_fn   pre;
        Xilinx_pgm_fn   pgm;
        Xilinx_clk_fn   clk;
-       Xilinx_rdata_fn rdata;
-       Xilinx_wdata_fn wdata;
-       int             relocated;
+       Xilinx_init_fn  init;
+       Xilinx_done_fn  done;
+       Xilinx_wr_fn    wr;
+       Xilinx_post_fn  post;
+       int             relocated;
 } Xilinx_Spartan2_Slave_Serial_fns;
 
 /* Device Image Sizes
  *********************************************************************/
 /* Spartan-II (2.5V) */
-#define XILINX_XC2S15_SIZE     197728/8
-#define XILINX_XC2S30_SIZE     336800/8
-#define XILINX_XC2S50_SIZE     559232/8
-#define XILINX_XC2S100_SIZE    781248/8
-#define XILINX_XC2S150_SIZE    1040128/8
+#define XILINX_XC2S15_SIZE     197728/8
+#define XILINX_XC2S30_SIZE     336800/8
+#define XILINX_XC2S50_SIZE     559232/8
+#define XILINX_XC2S100_SIZE    781248/8
+#define XILINX_XC2S150_SIZE    1040128/8
+#define XILINX_XC2S200_SIZE    1335872/8
+
+/* Spartan-IIE (1.8V) */
+#define XILINX_XC2S50E_SIZE     630048/8
+#define XILINX_XC2S100E_SIZE    863840/8
+#define XILINX_XC2S150E_SIZE    1134496/8
+#define XILINX_XC2S200E_SIZE    1442016/8
+#define XILINX_XC2S300E_SIZE    1875648/8
 
 /* Descriptor Macros
  *********************************************************************/
@@ -86,5 +97,22 @@ typedef struct {
 #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
 { Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
 
-#endif /* _SPARTAN2_H_ */
+#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
+
+#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
+
+#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie }
+
+#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie }
 
+#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie }
+
+#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie }
+
+#endif /* _SPARTAN2_H_ */