X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=Documentation%2Fdevicetree%2Fbindings%2Fiommu%2Farm%2Csmmu-v3.txt;h=947863acc2d44af304fe1e4d1b44b05bae4cf058;hb=65e765ab385fc1ee5568db9a2733afd165b36474;hp=3443e0f838dfc8a53e548527a05cf9892f2c2a92;hpb=9f30a04d768f64280dc0c40b730746e82f298d88;p=karo-tx-linux.git diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt index 3443e0f838df..947863acc2d4 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt @@ -36,5 +36,24 @@ the PCIe specification. NOTE: this only applies to the SMMU itself, not masters connected upstream of the SMMU. +- msi-parent : See the generic MSI binding described in + devicetree/bindings/interrupt-controller/msi.txt + for a description of the msi-parent property. + - hisilicon,broken-prefetch-cmd : Avoid sending CMD_PREFETCH_* commands to the SMMU. + +** Example + + smmu@2b400000 { + compatible = "arm,smmu-v3"; + reg = <0x0 0x2b400000 0x0 0x20000>; + interrupts = , + , + , + ; + interrupt-names = "eventq", "priq", "cmdq-sync", "gerror"; + dma-coherent; + #iommu-cells = <0>; + msi-parent = <&its 0xff0000>; + };