X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=arch%2Farm%2Finclude%2Fasm%2Farch-at91%2Fclk.h;h=04b0f8322ca17b71b151fcd9de297ad9d21cbe3d;hb=69f14dc2fd64307f012381dd333a06001dec75dc;hp=457e6c9b2b57ed202a4b9634092d30c1f704f3ae;hpb=1592ef8596fffd937a30462eb15f1d64e237ae49;p=karo-tx-uboot.git diff --git a/arch/arm/include/asm/arch-at91/clk.h b/arch/arm/include/asm/arch-at91/clk.h index 457e6c9b2b..04b0f8322c 100644 --- a/arch/arm/include/asm/arch-at91/clk.h +++ b/arch/arm/include/asm/arch-at91/clk.h @@ -1,6 +1,6 @@ /* * (C) Copyright 2007 - * Stelian Pop + * Stelian Pop * Lead Tech Design * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD * @@ -26,13 +26,43 @@ #define __ASM_ARM_ARCH_CLK_H__ #include +#include -unsigned long get_cpu_clk_rate(void); -unsigned long get_main_clk_rate(void); -unsigned long get_mck_clk_rate(void); -unsigned long get_plla_clk_rate(void); -unsigned long get_pllb_clk_rate(void); -unsigned int get_pllb_init(void); +static inline unsigned long get_cpu_clk_rate(void) +{ + DECLARE_GLOBAL_DATA_PTR; + return gd->arch.cpu_clk_rate_hz; +} + +static inline unsigned long get_main_clk_rate(void) +{ + DECLARE_GLOBAL_DATA_PTR; + return gd->arch.main_clk_rate_hz; +} + +static inline unsigned long get_mck_clk_rate(void) +{ + DECLARE_GLOBAL_DATA_PTR; + return gd->arch.mck_rate_hz; +} + +static inline unsigned long get_plla_clk_rate(void) +{ + DECLARE_GLOBAL_DATA_PTR; + return gd->arch.plla_rate_hz; +} + +static inline unsigned long get_pllb_clk_rate(void) +{ + DECLARE_GLOBAL_DATA_PTR; + return gd->arch.pllb_rate_hz; +} + +static inline u32 get_pllb_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + return gd->arch.at91_pllb_usb_init; +} static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) { @@ -65,4 +95,5 @@ static inline unsigned long get_mci_clk_rate(void) } int at91_clock_init(unsigned long main_clock); +void at91_periph_clk_enable(int id); #endif /* __ASM_ARM_ARCH_CLK_H__ */