X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=board%2Fhymod%2Fbsp.c;h=e54640f2d2d63992edbc33b10947cab7e666cad1;hb=8b485ba12b0defa0c4ed3559789250238f8331a8;hp=2ceaeb5159092e02cced317c02e47ed6405d044c;hpb=eb9401e3ebfa6a1550522be28895af461137f797;p=karo-tx-uboot.git diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c index 2ceaeb5159..e54640f2d2 100644 --- a/board/hymod/bsp.c +++ b/board/hymod/bsp.c @@ -2,39 +2,23 @@ * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * - * See file CREDITS for list of people who contributed to this - * project. + * SPDX-License-Identifier: GPL-2.0+ * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * hacked for Hymod FPGA support by Murray.Jensen@cmst.csiro.au, 29-Jan-01 + * hacked for Hymod FPGA support by Murray.Jensen@csiro.au, 29-Jan-01 */ #include #include #include -#include #include -#include + +DECLARE_GLOBAL_DATA_PTR; /*----------------------------------------------------------------------- * Board Special Commands: FPGA load/store, EEPROM erase */ -#if (CONFIG_COMMANDS & CFG_CMD_BSP) +#if defined(CONFIG_CMD_BSP) #define LOAD_SUCCESS 0 #define LOAD_FAIL_NOCONF 1 @@ -74,28 +58,27 @@ * has not worked (wait several ms?) */ -int fpga_load (int mezz, uchar * addr, ulong size) +int +fpga_load(int mezz, const uchar *addr, ulong size) { - DECLARE_GLOBAL_DATA_PTR; - hymod_conf_t *cp = &gd->bd->bi_hymod_conf; + xlx_info_t *fp; xlx_iopins_t *fpgaio; volatile uchar *fpgabase; volatile uint cnt; - uchar *eaddr = addr + size; + const uchar *eaddr = addr + size; int result; - if (mezz) { - if (!cp->mezz.mmap[0].prog.exists) - return (LOAD_FAIL_NOCONF); - fpgabase = (uchar *) cp->mezz.mmap[0].prog.base; - fpgaio = &cp->mezz.iopins[0]; - } else { - if (!cp->main.mmap[0].prog.exists) - return (LOAD_FAIL_NOCONF); - fpgabase = (uchar *) cp->main.mmap[0].prog.base; - fpgaio = &cp->main.iopins[0]; - } + if (mezz) + fp = &cp->mezz.xlx[0]; + else + fp = &cp->main.xlx[0]; + + if (!fp->mmap.prog.exists) + return (LOAD_FAIL_NOCONF); + + fpgabase = (uchar *)fp->mmap.prog.base; + fpgaio = &fp->iopins; /* set enable HIGH if required */ if (fpgaio->enable_pin.flag) @@ -106,7 +89,7 @@ int fpga_load (int mezz, uchar * addr, ulong size) /* toggle PROG Low then High (will already be Low after Power-On) */ iopin_set_low (&fpgaio->prog_pin); - udelay (1); /* minimum 300ns - 1usec should do it */ + udelay (1); /* minimum 300ns - 1usec should do it */ iopin_set_high (&fpgaio->prog_pin); /* wait for INIT High */ @@ -142,7 +125,7 @@ int fpga_load (int mezz, uchar * addr, ulong size) /* ------------------------------------------------------------------------- */ int -do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { uchar *addr, *save_addr; ulong size; @@ -157,15 +140,15 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) case 2: if (strcmp (argv[1], "info") == 0) { printf ("\nHymod FPGA Info...\n"); - printf (" Address Size\n"); - printf (" Main Configuration: 0x%08x %d\n", - FPGA_MAIN_CFG_BASE, FPGA_MAIN_CFG_SIZE); - printf (" Main Register: 0x%08x %d\n", - FPGA_MAIN_REG_BASE, FPGA_MAIN_REG_SIZE); - printf (" Main Port: 0x%08x %d\n", - FPGA_MAIN_PORT_BASE, FPGA_MAIN_PORT_SIZE); - printf (" Mezz Configuration: 0x%08x %d\n", - FPGA_MEZZ_CFG_BASE, FPGA_MEZZ_CFG_SIZE); + printf ("\t\t\t\tAddress\t\tSize\n"); + printf ("\tMain Configuration:\t0x%08x\t%d\n", + FPGA_MAIN_CFG_BASE, FPGA_MAIN_CFG_SIZE); + printf ("\tMain Register:\t\t0x%08x\t%d\n", + FPGA_MAIN_REG_BASE, FPGA_MAIN_REG_SIZE); + printf ("\tMain Port:\t\t0x%08x\t%d\n", + FPGA_MAIN_PORT_BASE, FPGA_MAIN_PORT_SIZE); + printf ("\tMezz Configuration:\t0x%08x\t%d\n", + FPGA_MEZZ_CFG_BASE, FPGA_MEZZ_CFG_SIZE); return 0; } break; @@ -176,18 +159,21 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) save_addr = addr; #if 0 - /* reading config data unimplemented */ - while VM - :more config data * addr++ = *fpga; - result = VM:? ? ? + /* fpga readback unimplemented */ + while (more readback data) + *addr++ = *fpga; + result = error ? STORE_FAIL_XXX : STORE_SUCCESS; #else - result = 0; + result = STORE_SUCCESS; #endif + if (result == STORE_SUCCESS) { - printf ("SUCCEEDED (%d bytes)\n", addr - save_addr); + printf ("SUCCEEDED (%d bytes)\n", + addr - save_addr); return 0; } else - printf ("FAILED (%d bytes)\n", addr - save_addr); + printf ("FAILED (%d bytes)\n", + addr - save_addr); return 1; } break; @@ -196,25 +182,32 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) if (strcmp (argv[1], "tftp") == 0) { copy_filename (BootFile, argv[2], sizeof (BootFile)); load_addr = simple_strtoul (argv[3], NULL, 16); + NetBootFileXferSize = 0; - if (NetLoop (TFTP) <= 0) { - printf ("tftp transfer failed - aborting fgpa load\n"); + if (NetLoop(TFTPGET) <= 0) { + printf ("tftp transfer failed - aborting " + "fgpa load\n"); return 1; } if (NetBootFileXferSize == 0) { - printf ("can't determine file size - aborting fpga load\n"); + printf ("can't determine file size - " + "aborting fpga load\n"); return 1; } - printf ("File transfer succeeded - beginning fpga load..."); + printf ("File transfer succeeded - " + "beginning fpga load..."); result = fpga_load (0, (uchar *) load_addr, - NetBootFileXferSize); + NetBootFileXferSize); + if (result == LOAD_SUCCESS) { printf ("SUCCEEDED\n"); return 0; - } else if (result == LOAD_FAIL_NOINIT) + } else if (result == LOAD_FAIL_NOCONF) + printf ("FAILED (no CONF)\n"); + else if (result == LOAD_FAIL_NOINIT) printf ("FAILED (no INIT)\n"); else printf ("FAILED (no DONE)\n"); @@ -231,7 +224,8 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) else if (strcmp (argv[2], "mezz") == 0) mezz = 1; else { - printf ("FPGA type must be either `main' or `mezz'\n"); + printf ("FPGA type must be either " + "`main' or `mezz'\n"); return 1; } arg = 3; @@ -239,14 +233,18 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) mezz = 0; arg = 2; } + addr = (uchar *) simple_strtoul (argv[arg++], NULL, 16); size = (ulong) simple_strtoul (argv[arg], NULL, 16); result = fpga_load (mezz, addr, size); + if (result == LOAD_SUCCESS) { printf ("SUCCEEDED\n"); return 0; - } else if (result == LOAD_FAIL_NOINIT) + } else if (result == LOAD_FAIL_NOCONF) + printf ("FAILED (no CONF)\n"); + else if (result == LOAD_FAIL_NOINIT) printf ("FAILED (no INIT)\n"); else printf ("FAILED (no DONE)\n"); @@ -258,50 +256,132 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) break; } - printf ("Usage:\n%s\n", cmdtp->usage); - return 1; + return cmd_usage(cmdtp); } - +U_BOOT_CMD( + fpga, 6, 1, do_fpga, + "FPGA sub-system", + "load [type] addr size\n" + " - write the configuration data at memory address `addr',\n" + " size `size' bytes, into the FPGA of type `type' (either\n" + " `main' or `mezz', default `main'). e.g.\n" + " `fpga load 100000 7d8f'\n" + " loads the main FPGA with config data at address 100000\n" + " HEX, size 7d8f HEX (32143 DEC) bytes\n" + "fpga tftp file addr\n" + " - transfers `file' from the tftp server into memory at\n" + " address `addr', then writes the entire file contents\n" + " into the main FPGA\n" + "fpga store addr\n" + " - read configuration data from the main FPGA (the mezz\n" + " FPGA is write-only), into address `addr'. There must be\n" + " enough memory available at `addr' to hold all the config\n" + " data - the size of which is determined by VC:???\n" + "fpga info\n" + " - print information about the Hymod FPGA, namely the\n" + " memory addresses at which the four FPGA local bus\n" + " address spaces appear in the physical address space" +); /* ------------------------------------------------------------------------- */ int -do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { uchar data[HYMOD_EEPROM_SIZE]; - uint offset; - int rcode = 0; + uint addr = CONFIG_SYS_I2C_EEPROM_ADDR; switch (argc) { case 1: - offset = HYMOD_EEOFF_MAIN; + addr |= HYMOD_EEOFF_MAIN; break; case 2: if (strcmp (argv[1], "main") == 0) { - offset = HYMOD_EEOFF_MAIN; + addr |= HYMOD_EEOFF_MAIN; break; } if (strcmp (argv[1], "mezz") == 0) { - offset = HYMOD_EEOFF_MEZZ; + addr |= HYMOD_EEOFF_MEZZ; break; } /* fall through ... */ default: - printf ("Usage:\n%s\n", cmdtp->usage); - return 1; + return cmd_usage(cmdtp); } memset (data, 0, HYMOD_EEPROM_SIZE); - if (i2c_write - (CFG_I2C_EEPROM_ADDR | offset, 0, CFG_I2C_EEPROM_ADDR_LEN, data, - HYMOD_EEPROM_SIZE)) { - rcode = 1; - } - return rcode; -} + eeprom_write (addr, 0, data, HYMOD_EEPROM_SIZE); -#endif /* CFG_CMD_BSP */ + return 0; +} +U_BOOT_CMD( + eeclear, 1, 0, do_eecl, + "Clear the eeprom on a Hymod board", + "[type]\n" + " - write zeroes into the EEPROM on the board of type `type'\n" + " (`type' is either `main' or `mezz' - default `main')\n" + " Note: the EEPROM write enable jumper must be installed" +); /* ------------------------------------------------------------------------- */ + +int +do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ +#if 0 + int rc; +#endif +#ifdef CONFIG_ETHER_LOOPBACK_TEST + extern void eth_loopback_test (void); +#endif /* CONFIG_ETHER_LOOPBACK_TEST */ + + printf ("HYMOD tests - ensure loopbacks etc. are connected\n\n"); + +#if 0 + /* Load FPGA with test program */ + + printf ("Loading test FPGA program ..."); + + rc = fpga_load (0, test_bitfile, sizeof (test_bitfile)); + + switch (rc) { + + case LOAD_SUCCESS: + printf (" SUCCEEDED\n"); + break; + + case LOAD_FAIL_NOCONF: + printf (" FAILED (no configuration space defined)\n"); + return 1; + + case LOAD_FAIL_NOINIT: + printf (" FAILED (timeout - no INIT signal seen)\n"); + return 1; + + case LOAD_FAIL_NODONE: + printf (" FAILED (timeout - no DONE signal seen)\n"); + return 1; + + default: + printf (" FAILED (unknown return code from fpga_load\n"); + return 1; + } + + /* run Local Bus <=> Xilinx tests */ + + /* tell Xilinx to run ZBT Ram, High Speed serial and Mezzanine tests */ + + /* run SDRAM test */ +#endif + +#ifdef CONFIG_ETHER_LOOPBACK_TEST + /* run Ethernet test */ + eth_loopback_test (); +#endif /* CONFIG_ETHER_LOOPBACK_TEST */ + + return 0; +} + +#endif