X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=board%2Fnvidia%2Fcommon%2Fboard.c;h=76ec6876e21b51d4ea4da512109c2fc76215cfc1;hb=da77a0e593c370c9ed79ea22c1df321d5f4e4bbf;hp=0f12de2097a2d87def7e5d2b80ca1d0c64aea8f7;hpb=ae03661fda98465420016b410a27e6bf2a3c03f4;p=karo-tx-uboot.git

diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 0f12de2097..76ec6876e2 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -23,22 +23,34 @@
 
 #include <common.h>
 #include <ns16550.h>
+#include <linux/compiler.h>
 #include <asm/io.h>
-#include <asm/arch/tegra2.h>
-#include <asm/arch/sys_proto.h>
-
-#include <asm/arch/clk_rst.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/display.h>
+#include <asm/arch/emc.h>
+#include <asm/arch/funcmux.h>
 #include <asm/arch/pinmux.h>
-#include <asm/arch/uart.h>
-#include "board.h"
+#include <asm/arch/pmu.h>
+#include <asm/arch/pwm.h>
+#include <asm/arch/tegra.h>
+#include <asm/arch/usb.h>
+#include <asm/arch-tegra/board.h>
+#include <asm/arch-tegra/clk_rst.h>
+#include <asm/arch-tegra/pmc.h>
+#include <asm/arch-tegra/sys_proto.h>
+#include <asm/arch-tegra/uart.h>
+#include <asm/arch-tegra/warmboot.h>
+#include <spi.h>
+#include <i2c.h>
+#include "emc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-const struct tegra2_sysinfo sysinfo = {
-	CONFIG_TEGRA2_BOARD_STRING
+const struct tegra_sysinfo sysinfo = {
+	CONFIG_TEGRA_BOARD_STRING
 };
 
+#ifndef CONFIG_SPL_BUILD
 /*
  * Routine: timer_init
  * Description: init the timestamp and lastinc value
@@ -47,53 +59,47 @@ int timer_init(void)
 {
 	return 0;
 }
+#endif
 
-static void enable_uart(enum periph_id pid)
+void __pin_mux_usb(void)
 {
-	/* Assert UART reset and enable clock */
-	reset_set_enable(pid, 1);
-	clock_enable(pid);
-	clock_ll_set_source(pid, 0);	/* UARTx_CLK_SRC = 00, PLLP_OUT0 */
+}
 
-	/* wait for 2us */
-	udelay(2);
+void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
 
-	/* De-assert reset to UART */
-	reset_set_enable(pid, 0);
+void __pin_mux_spi(void)
+{
 }
 
-/*
- * Routine: clock_init_uart
- * Description: init the PLL and clock for the UART(s)
- */
-static void clock_init_uart(void)
+void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
+
+void __gpio_early_init_uart(void)
 {
-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
-	enable_uart(PERIPH_ID_UART1);
-#endif	/* CONFIG_TEGRA2_ENABLE_UARTA */
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
-	enable_uart(PERIPH_ID_UART4);
-#endif	/* CONFIG_TEGRA2_ENABLE_UARTD */
 }
 
+void gpio_early_init_uart(void)
+__attribute__((weak, alias("__gpio_early_init_uart")));
+
+void __pin_mux_nand(void)
+{
+	funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
+}
+
+void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
+
 /*
- * Routine: pin_mux_uart
- * Description: setup the pin muxes/tristate values for the UART(s)
+ * Routine: power_det_init
+ * Description: turn off power detects
  */
-static void pin_mux_uart(void)
+static void power_det_init(void)
 {
-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
-	pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
-	pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
-
-	pinmux_tristate_disable(PINGRP_IRRX);
-	pinmux_tristate_disable(PINGRP_IRTX);
-#endif	/* CONFIG_TEGRA2_ENABLE_UARTA */
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
-	pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
-
-	pinmux_tristate_disable(PINGRP_GMC);
-#endif	/* CONFIG_TEGRA2_ENABLE_UARTD */
+#if defined(CONFIG_TEGRA20)
+	struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
+
+	/* turn off power detects */
+	writel(0, &pmc->pmc_pwr_det_latch);
+	writel(0, &pmc->pmc_pwr_det);
+#endif
 }
 
 /*
@@ -102,32 +108,97 @@ static void pin_mux_uart(void)
  */
 int board_init(void)
 {
+	__maybe_unused int err;
+
+	/* Do clocks and UART first so that printf() works */
 	clock_init();
 	clock_verify();
 
+#ifdef CONFIG_SPI_UART_SWITCH
+	gpio_config_uart();
+#endif
+#ifdef CONFIG_TEGRA_SPI
+	pin_mux_spi();
+	spi_init();
+#endif
+#ifdef CONFIG_PWM_TEGRA
+	if (pwm_init(gd->fdt_blob))
+		debug("%s: Failed to init pwm\n", __func__);
+#endif
+#ifdef CONFIG_LCD
+	tegra_lcd_check_next_stage(gd->fdt_blob, 0);
+#endif
 	/* boot param addr */
 	gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
 
+	power_det_init();
+
+#ifdef CONFIG_TEGRA_I2C
+#ifndef CONFIG_SYS_I2C_INIT_BOARD
+#error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
+#endif
+	i2c_init_board();
+# ifdef CONFIG_TEGRA_PMU
+	if (pmu_set_nominal())
+		debug("Failed to select nominal voltages\n");
+#  ifdef CONFIG_TEGRA_CLOCK_SCALING
+	err = board_emc_init();
+	if (err)
+		debug("Memory controller init failed: %d\n", err);
+#  endif
+# endif /* CONFIG_TEGRA_PMU */
+#endif /* CONFIG_TEGRA_I2C */
+
+#ifdef CONFIG_USB_EHCI_TEGRA
+	pin_mux_usb();
+	board_usb_init(gd->fdt_blob);
+#endif
+#ifdef CONFIG_LCD
+	tegra_lcd_check_next_stage(gd->fdt_blob, 0);
+#endif
+
+#ifdef CONFIG_TEGRA_NAND
+	pin_mux_nand();
+#endif
+
+#ifdef CONFIG_TEGRA_LP0
+	/* save Sdram params to PMC 2, 4, and 24 for WB0 */
+	warmboot_save_sdram_params();
+
+	/* prepare the WB code to LP0 location */
+	warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
+#endif
+
 	return 0;
 }
 
 #ifdef CONFIG_BOARD_EARLY_INIT_F
-int board_early_init_f(void)
+static void __gpio_early_init(void)
 {
-	/* Initialize essential common plls */
-	clock_early_init();
+}
 
-	/* Initialize UART clocks */
-	clock_init_uart();
+void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
 
-	/* Initialize periph pinmuxes */
-	pin_mux_uart();
+int board_early_init_f(void)
+{
+	board_init_uart_f();
 
 	/* Initialize periph GPIOs */
-	gpio_config_uart();
+	gpio_early_init();
+	gpio_early_init_uart();
+#ifdef CONFIG_LCD
+	tegra_lcd_early_init(gd->fdt_blob);
+#endif
 
-	/* Init UART, scratch regs, and start CPU */
-	tegra2_start();
 	return 0;
 }
 #endif	/* EARLY_INIT */
+
+int board_late_init(void)
+{
+#ifdef CONFIG_LCD
+	/* Make sure we finish initing the LCD */
+	tegra_lcd_check_next_stage(gd->fdt_blob, 1);
+#endif
+	return 0;
+}