X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=board%2Futx8245%2Futx8245.c;h=69d19e39e9f8d0dd05ba4f22db7833097aec4603;hb=8d67c3685e3b4bea8524e2e25b1443b62a69352b;hp=249862a5a4fddab52b7a921f60d3434a270b8ae1;hpb=c609719b8d1b2dca590e0ed499016d041203e403;p=karo-tx-uboot.git

diff --git a/board/utx8245/utx8245.c b/board/utx8245/utx8245.c
index 249862a5a4..69d19e39e9 100644
--- a/board/utx8245/utx8245.c
+++ b/board/utx8245/utx8245.c
@@ -7,30 +7,16 @@
  * Matthew E. Karger, karger@arlut.utexas.edu
  * Applied Research Laboratories, The University of Texas at Austin
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
 #include <mpc824x.h>
 #include <asm/processor.h>
 #include <asm/io.h>
+#include <asm/mmu.h>
 #include <pci.h>
+#include <netdev.h>
 
 #define	SAVE_SZ	32
 
@@ -45,63 +31,32 @@ int checkboard(void)
 }
 
 
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
-#if 1
-	int				i, cnt;
-	volatile uchar	*base =	CFG_SDRAM_BASE;
-	volatile ulong	*addr;
-	ulong			save[SAVE_SZ];
-	ulong			val, ret  = 0;
-
-	for (i=0; i<SAVE_SZ; i++)	{save[i] = 0;}		/* clear table */
-
-	for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1)
-	{
-		addr = (volatile ulong *)base + cnt;
-		save[i++] = *addr;
-		*addr = ~cnt;
-	}
-
-	addr = (volatile ulong *)base;
-	save[i] = *addr;
-	*addr = 0;
-
-	if (*addr != 0)
-	{
-		*addr = save[i];
-		goto Done;
-	}
-
-	for (cnt = 1; cnt < CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1)
-	{
-		addr = (volatile ulong *)base + cnt;
-		val = *addr;
-		*addr = save[--i];
-		if (val != ~cnt)
-		{
-			ulong new_bank0_end = cnt * sizeof(long) - 1;
-			ulong mear1  = mpc824x_mpc107_getreg(MEAR1);
-			ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
-			mear1 =  (mear1  & 0xFFFFFF00) |
-			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
-			emear1 = (emear1 & 0xFFFFFF00) |
-			  ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
-			mpc824x_mpc107_setreg(MEAR1,  mear1);
-			mpc824x_mpc107_setreg(EMEAR1, emear1);
-
-			ret = cnt * sizeof(long);
-			goto Done;
-		}
-	}
-
-	ret = CFG_MAX_RAM_SIZE;
-Done:
-	return ret;
-#else
-	return (CFG_MAX_RAM_SIZE);
-#endif
-
+	long size;
+	long new_bank0_end;
+	long new_bank1_end;
+	long mear1;
+	long emear1;
+
+	size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
+
+	new_bank0_end = size/2 - 1;
+	new_bank1_end = size - 1;
+	mear1 = mpc824x_mpc107_getreg(MEAR1);
+	emear1 = mpc824x_mpc107_getreg(EMEAR1);
+
+	mear1 = (mear1  & 0xFFFF0000) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) |
+		((new_bank1_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT << 8);
+	emear1 = (emear1 & 0xFFFF0000) |
+		((new_bank0_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) |
+		((new_bank1_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT << 8);
+
+	mpc824x_mpc107_setreg(MEAR1, mear1);
+	mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+	return (size);
 }
 
 
@@ -111,11 +66,11 @@ Done:
 
 static struct pci_config_table pci_utx8245_config_table[] = {
 #ifndef CONFIG_PCI_PNP
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0C, PCI_ANY_ID,
 	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
 				       PCI_ENET0_MEMADDR,
 				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
-	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0B, PCI_ANY_ID,
 	  pci_cfgfunc_config_device, { PCI_FIREWIRE_IOADDR,
 				       PCI_FIREWIRE_MEMADDR,
 				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
@@ -133,6 +88,14 @@ static void pci_utx8245_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
 	else if (PCI_DEV(dev) == 12)
 		/* assign serial interrupt line 8 (int24) to Ethernet */
 		pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 24);
+
+	else if (PCI_DEV(dev) == 14)
+		/* assign serial interrupt line 0 (int16) to PMC slot 0 */
+		pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 16);
+
+	else if (PCI_DEV(dev) == 15)
+		/* assign serial interrupt line 1 (int17) to PMC slot 1 */
+		pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 17);
 }
 
 static struct pci_controller utx8245_hose = {
@@ -143,10 +106,14 @@ static struct pci_controller utx8245_hose = {
 #endif /*CONFIG_PCI_PNP*/
 };
 
-void pci_init (void)
+void pci_init_board (void)
 {
 	pci_mpc824x_init(&utx8245_hose);
 
 	icache_enable();
 }
 
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}