X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=common%2Fcmd_fpga.c;h=c4b3c8fc56b8303ba7739bf7931b1fb38201afa4;hb=27943a4583d018c9c2d2a505e51b929087459681;hp=cce23ad70d78ce4e316583d71f40d23c41bbc8dd;hpb=e81a95a9e7cb68ab611e074cd65790015520ea99;p=karo-tx-uboot.git diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c index cce23ad70d..c4b3c8fc56 100644 --- a/common/cmd_fpga.c +++ b/common/cmd_fpga.c @@ -2,24 +2,7 @@ * (C) Copyright 2000, 2001 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -27,27 +10,11 @@ */ #include #include -#if defined(CONFIG_CMD_NET) -#include -#endif #include #include -#if 0 -#define FPGA_DEBUG -#endif - -#ifdef FPGA_DEBUG -#define PRINTF(fmt,args...) printf (fmt ,##args) -#else -#define PRINTF(fmt,args...) -#endif - -#if defined (CONFIG_FPGA) && defined(CONFIG_CMD_FPGA) - /* Local functions */ -static void fpga_usage (cmd_tbl_t * cmdtp); -static int fpga_get_op (char *opstr); +static int fpga_get_op(char *opstr); /* Local defines */ #define FPGA_NONE -1 @@ -57,134 +24,6 @@ static int fpga_get_op (char *opstr); #define FPGA_DUMP 3 #define FPGA_LOADMK 4 -/* Convert bitstream data and load into the fpga */ -int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) -{ -#if (CONFIG_FPGA & CFG_FPGA_XILINX) - unsigned int length; - unsigned char* swapdata; - unsigned int swapsize; - char buffer[80]; - unsigned char *ptr; - unsigned char *dataptr; - unsigned char data; - unsigned int i; - int rc; - - dataptr = (unsigned char *)fpgadata; - - /* skip the first bytes of the bitsteam, their meaning is unknown */ - length = (*dataptr << 8) + *(dataptr+1); - dataptr+=2; - dataptr+=length; - - /* get design name (identifier, length, string) */ - length = (*dataptr << 8) + *(dataptr+1); - dataptr+=2; - if (*dataptr++ != 0x61) { - PRINTF ("%s: Design name identifier not recognized in bitstream\n", - __FUNCTION__ ); - return FPGA_FAIL; - } - - length = (*dataptr << 8) + *(dataptr+1); - dataptr+=2; - for(i=0;i= size) { - printf("%s: Could not find right length of data in bitstream\n", - __FUNCTION__); - return FPGA_FAIL; - } - - /* allocate memory */ - swapdata = (unsigned char *)malloc(swapsize); - if (swapdata == NULL) { - printf("%s: Could not allocate %d bytes memory !\n", - __FUNCTION__, swapsize); - return FPGA_FAIL; - } - - /* read data into memory and swap bits */ - ptr = swapdata; - for (i = 0; i < swapsize; i++) { - data = 0x00; - data |= (*dataptr & 0x01) << 7; - data |= (*dataptr & 0x02) << 5; - data |= (*dataptr & 0x04) << 3; - data |= (*dataptr & 0x08) << 1; - data |= (*dataptr & 0x10) >> 1; - data |= (*dataptr & 0x20) >> 3; - data |= (*dataptr & 0x40) >> 5; - data |= (*dataptr & 0x80) >> 7; - *ptr++ = data; - dataptr++; - } - - rc = fpga_load(dev, swapdata, swapsize); - free(swapdata); - return rc; -#else - printf("Bitstream support only for Xilinx devices\n"); - return FPGA_FAIL; -#endif -} - /* ------------------------------------------------------------------------- */ /* command form: * fpga @@ -193,59 +32,121 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) * If there is no data addr field, the fpgadata environment variable is used. * The info command requires no data address field. */ -int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { int op, dev = FPGA_INVALID_DEVICE; size_t data_size = 0; void *fpga_data = NULL; - char *devstr = getenv ("fpga"); - char *datastr = getenv ("fpgadata"); + char *devstr = getenv("fpga"); + char *datastr = getenv("fpgadata"); int rc = FPGA_FAIL; + int wrong_parms = 0; +#if defined(CONFIG_FIT) + const char *fit_uname = NULL; + ulong fit_addr; +#endif if (devstr) - dev = (int) simple_strtoul (devstr, NULL, 16); + dev = (int) simple_strtoul(devstr, NULL, 16); if (datastr) - fpga_data = (void *) simple_strtoul (datastr, NULL, 16); + fpga_data = (void *)simple_strtoul(datastr, NULL, 16); switch (argc) { case 5: /* fpga */ - data_size = simple_strtoul (argv[4], NULL, 16); + data_size = simple_strtoul(argv[4], NULL, 16); + case 4: /* fpga */ - fpga_data = (void *) simple_strtoul (argv[3], NULL, 16); - PRINTF ("%s: fpga_data = 0x%x\n", __FUNCTION__, (uint) fpga_data); +#if defined(CONFIG_FIT) + if (fit_parse_subimage(argv[3], (ulong)fpga_data, + &fit_addr, &fit_uname)) { + fpga_data = (void *)fit_addr; + debug("* fpga: subimage '%s' from FIT image ", + fit_uname); + debug("at 0x%08lx\n", fit_addr); + } else +#endif + { + fpga_data = (void *)simple_strtoul(argv[3], NULL, 16); + debug("* fpga: cmdline image address = 0x%08lx\n", + (ulong)fpga_data); + } + debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data); + case 3: /* fpga */ - dev = (int) simple_strtoul (argv[2], NULL, 16); - PRINTF ("%s: device = %d\n", __FUNCTION__, dev); + dev = (int)simple_strtoul(argv[2], NULL, 16); + debug("%s: device = %d\n", __func__, dev); /* FIXME - this is a really weak test */ - if ((argc == 3) && (dev > fpga_count ())) { /* must be buffer ptr */ - PRINTF ("%s: Assuming buffer pointer in arg 3\n", - __FUNCTION__); - fpga_data = (void *) dev; - PRINTF ("%s: fpga_data = 0x%x\n", - __FUNCTION__, (uint) fpga_data); + if ((argc == 3) && (dev > fpga_count())) { + /* must be buffer ptr */ + debug("%s: Assuming buffer pointer in arg 3\n", + __func__); + +#if defined(CONFIG_FIT) + if (fit_parse_subimage(argv[2], (ulong)fpga_data, + &fit_addr, &fit_uname)) { + fpga_data = (void *)fit_addr; + debug("* fpga: subimage '%s' from FIT image ", + fit_uname); + debug("at 0x%08lx\n", fit_addr); + } else +#endif + { + fpga_data = (void *)dev; + debug("* fpga: cmdline image addr = 0x%08lx\n", + (ulong)fpga_data); + } + + debug("%s: fpga_data = 0x%x\n", + __func__, (uint)fpga_data); dev = FPGA_INVALID_DEVICE; /* reset device num */ } + case 2: /* fpga */ - op = (int) fpga_get_op (argv[1]); + op = (int)fpga_get_op(argv[1]); break; + default: - PRINTF ("%s: Too many or too few args (%d)\n", - __FUNCTION__, argc); + debug("%s: Too many or too few args (%d)\n", __func__, argc); op = FPGA_NONE; /* force usage display */ break; } + if (dev == FPGA_INVALID_DEVICE) { + puts("FPGA device not specified\n"); + op = FPGA_NONE; + } + switch (op) { case FPGA_NONE: - fpga_usage (cmdtp); + case FPGA_INFO: + break; + case FPGA_LOAD: + case FPGA_LOADB: + case FPGA_DUMP: + if (!fpga_data || !data_size) + wrong_parms = 1; + break; + case FPGA_LOADMK: + if (!fpga_data) + wrong_parms = 1; break; + } + + if (wrong_parms) { + puts("Wrong parameters for FPGA request\n"); + op = FPGA_NONE; + } + + switch (op) { + case FPGA_NONE: + return CMD_RET_USAGE; case FPGA_INFO: - rc = fpga_info (dev); + rc = fpga_info(dev); break; case FPGA_LOAD: - rc = fpga_load (dev, fpga_data, data_size); + rc = fpga_load(dev, fpga_data, data_size); break; case FPGA_LOADB: @@ -253,72 +154,117 @@ int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) break; case FPGA_LOADMK: - { - image_header_t header; - image_header_t *hdr = &header; - ulong data; - - memmove (&header, (char *)fpga_data, sizeof(image_header_t)); - if (ntohl(hdr->ih_magic) != IH_MAGIC) { - puts ("Bad Magic Number\n"); - return 1; + switch (genimg_get_format(fpga_data)) { + case IMAGE_FORMAT_LEGACY: + { + image_header_t *hdr = + (image_header_t *)fpga_data; + ulong data; + + data = (ulong)image_get_data(hdr); + data_size = image_get_data_size(hdr); + rc = fpga_load(dev, (void *)data, data_size); } - data = ((ulong)fpga_data + sizeof(image_header_t)); - data_size = ntohl(hdr->ih_size); - rc = fpga_load (dev, (void *)data, data_size); + break; +#if defined(CONFIG_FIT) + case IMAGE_FORMAT_FIT: + { + const void *fit_hdr = (const void *)fpga_data; + int noffset; + const void *fit_data; + + if (fit_uname == NULL) { + puts("No FIT subimage unit name\n"); + return 1; + } + + if (!fit_check_format(fit_hdr)) { + puts("Bad FIT image format\n"); + return 1; + } + + /* get fpga component image node offset */ + noffset = fit_image_get_node(fit_hdr, + fit_uname); + if (noffset < 0) { + printf("Can't find '%s' FIT subimage\n", + fit_uname); + return 1; + } + + /* verify integrity */ + if (!fit_image_verify(fit_hdr, noffset)) { + puts ("Bad Data Hash\n"); + return 1; + } + + /* get fpga subimage data address and length */ + if (fit_image_get_data(fit_hdr, noffset, + &fit_data, &data_size)) { + puts("Fpga subimage data not found\n"); + return 1; + } + + rc = fpga_load(dev, fit_data, data_size); + } + break; +#endif + default: + puts("** Unknown image type\n"); + rc = FPGA_FAIL; + break; } break; case FPGA_DUMP: - rc = fpga_dump (dev, fpga_data, data_size); + rc = fpga_dump(dev, fpga_data, data_size); break; default: - printf ("Unknown operation\n"); - fpga_usage (cmdtp); - break; + printf("Unknown operation\n"); + return CMD_RET_USAGE; } - return (rc); -} - -static void fpga_usage (cmd_tbl_t * cmdtp) -{ - printf ("Usage:\n%s\n", cmdtp->usage); + return rc; } /* * Map op to supported operations. We don't use a table since we * would just have to relocate it from flash anyway. */ -static int fpga_get_op (char *opstr) +static int fpga_get_op(char *opstr) { int op = FPGA_NONE; - if (!strcmp ("info", opstr)) { + if (!strcmp("info", opstr)) op = FPGA_INFO; - } else if (!strcmp ("loadb", opstr)) { + else if (!strcmp("loadb", opstr)) op = FPGA_LOADB; - } else if (!strcmp ("load", opstr)) { + else if (!strcmp("load", opstr)) op = FPGA_LOAD; - } else if (!strcmp ("loadmk", opstr)) { + else if (!strcmp("loadmk", opstr)) op = FPGA_LOADMK; - } else if (!strcmp ("dump", opstr)) { + else if (!strcmp("dump", opstr)) op = FPGA_DUMP; - } - if (op == FPGA_NONE) { - printf ("Unknown fpga operation \"%s\"\n", opstr); - } + if (op == FPGA_NONE) + printf("Unknown fpga operation \"%s\"\n", opstr); + return op; } -U_BOOT_CMD (fpga, 6, 1, do_fpga, - "fpga - loadable FPGA image support\n", - "fpga [operation type] [device number] [image address] [image size]\n" - "fpga operations:\n" - "\tinfo\tlist known device information\n" - "\tload\tLoad device from memory buffer\n" - "\tloadb\tLoad device from bitstream buffer (Xilinx devices only)\n" - "\tloadmk\tLoad device generated with mkimage\n" - "\tdump\tLoad device to memory buffer\n"); +U_BOOT_CMD(fpga, 6, 1, do_fpga, + "loadable FPGA image support", + "[operation type] [device number] [image address] [image size]\n" + "fpga operations:\n" + " dump\t[dev]\t\t\tLoad device to memory buffer\n" + " info\t[dev]\t\t\tlist known device information\n" + " load\t[dev] [address] [size]\tLoad device from memory buffer\n" + " loadb\t[dev] [address] [size]\t" + "Load device from bitstream buffer (Xilinx only)\n" + " loadmk [dev] [address]\tLoad device generated with mkimage" +#if defined(CONFIG_FIT) + "\n" + "\tFor loadmk operating on FIT format uImage address must include\n" + "\tsubimage unit name in the form of addr:" #endif +);