X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=doc%2FREADME.mpc8641hpcn;h=d8fe0a4a136b2bd5b053a86e98be38c4efc8c9af;hb=3b690ebbbf21303a3bac1f62d967c36cd8655ce0;hp=2c3c7034e2e613533d5fe19e93d76162327f137c;hpb=6d0f6bcf337c5261c08fabe12982178c2c489d76;p=karo-tx-uboot.git

diff --git a/doc/README.mpc8641hpcn b/doc/README.mpc8641hpcn
index 2c3c7034e2..d8fe0a4a13 100644
--- a/doc/README.mpc8641hpcn
+++ b/doc/README.mpc8641hpcn
@@ -79,51 +79,77 @@ Switches:
 
 3. Flash U-Boot
 ---------------
-The flash range 0xFF800000 to 0xFFFFFFFF can be divided into 2 halves.
+The flash range 0xEF800000 to 0xEFFFFFFF can be divided into 2 halves.
 It is possible to use either half to boot using u-boot.  Switch 5 bit 2
 is used for this purpose.
 
-0xFF800000 to 0xFFBFFFFF - 4MB
-0xFFC00000 to 0xFFFFFFFF - 4MB
-When this bit is 0, U-Boot is at 0xFFF00000.
-When this bit is 1, U-Boot is at 0xFFB00000.
+0xEF800000 to 0xEFBFFFFF - 4MB
+0xEFC00000 to 0xEFFFFFFF - 4MB
+When this bit is 0, U-Boot is at 0xEFF00000.
+When this bit is 1, U-Boot is at 0xEFB00000.
 
 Use the above mentioned flash commands to program the other half, and
 use switch 5, bit 2 to alternate between the halves.  Note: The booting
-version of U-Boot will always be at 0xFFF00000.
+version of U-Boot will always be at 0xEFF00000.
 
-To Flash U-Boot into the booting bank (0xFFC00000 - 0xFFFFFFFF):
+To Flash U-Boot into the booting bank (0xEFC00000 - 0xEFFFFFFF):
 
 	tftp 1000000 u-boot.bin
 	protect off all
-	erase fff00000 +$filesize
-	cp.b 1000000 fff00000 $filesize
+	erase eff00000 +$filesize
+	cp.b 1000000 eff00000 $filesize
 
 or use tftpflash command:
 	run tftpflash
 
-To Flash U-boot into the alternative bank (0xFF800000 - 0xFFBFFFFF):
+To Flash U-boot into the alternative bank (0xEF800000 - 0xEFBFFFFF):
 
 	tftp 1000000 u-boot.bin
-	erase ffb00000 +$filesize
-	cp.b 1000000 ffb00000 $filesize
+	erase efb00000 +$filesize
+	cp.b 1000000 efb00000 $filesize
 
 
 4. Memory Map
 -------------
+NOTE:  RIO and PCI are mutually exclusive, so they share an address
+
+For 32-bit u-boot, devices are mapped so that the virtual address ==
+the physical address, and the map looks liks this:
 
 	Memory Range			Device		Size
 	------------			------		----
 	0x0000_0000	0x7fff_ffff	DDR		2G
+	0x8000_0000	0x9fff_ffff	RIO MEM		512M
 	0x8000_0000	0x9fff_ffff	PCI1/PEX1 MEM	512M
-	0xa000_0000	0xafff_ffff	PCI2/PEX2 MEM	512M
-	0xf800_0000	0xf80f_ffff	CCSR		1M
-	0xf810_0000	0xf81f_ffff	PIXIS		1M
+	0xa000_0000	0xbfff_ffff	PCI2/PEX2 MEM	512M
+	0xffe0_0000	0xffef_ffff	CCSR		1M
+	0xffdf_0000	0xffdf_7fff	PIXIS		8K
+	0xffdf_8000	0xffdf_ffff	CF		8K
 	0xf840_0000	0xf840_3fff	Stack space	32K
-	0xe200_0000	0xe2ff_ffff	PCI1/PEX1 IO	16M
-	0xe300_0000	0xe3ff_ffff	PCI2/PEX2 IO	16M
-	0xfe00_0000	0xfeff_ffff	Flash(alternate)16M
-	0xff00_0000	0xffff_ffff	Flash(boot bank)16M
+	0xffc0_0000	0xffc0_ffff	PCI1/PEX1 IO	64K
+	0xffc1_0000	0xffc1_ffff	PCI2/PEX2 IO	64K
+	0xef80_0000	0xefff_ffff	Flash		8M
+
+For 36-bit-enabled u-boot, the virtual map is the same as for 32-bit.
+However, the physical map is altered to reside in 36-bit space, as follows.
+Addresses are no longer mapped with VA == PA.  All accesses from
+software use the VA; the PA is only used for setting up windows
+and mappings. Note that with the exception of PCI MEM and RIO, the low
+ 32 bits are the same as the VA above; only the top 4 bits vary:
+
+	Memory Range			Device		Size
+	------------			------		----
+	0x0_0000_0000	0x0_7fff_ffff	DDR		2G
+	0xc_0000_0000	0xc_1fff_ffff	RIO MEM		512M
+	0xc_0000_0000	0xc_1fff_ffff	PCI1/PEX1 MEM	512M
+	0xc_2000_0000	0xc_3fff_ffff	PCI2/PEX2 MEM	512M
+	0xf_ffe0_0000	0xf_ffef_ffff	CCSR		1M
+	0xf_ffdf_0000	0xf_ffdf_7fff	PIXIS		8K
+	0xf_ffdf_8000	0xf_ffdf_ffff	CF		8K
+	0x0_f840_0000	0xf_f840_3fff	Stack space	32K
+	0xf_ffc0_0000	0xf_ffc0_ffff	PCI1/PEX1 IO	64K
+	0xf_ffc1_0000	0xf_ffc1_ffff	PCI2/PEX2 IO	64K
+	0xf_ef80_0000	0xf_efff_ffff	Flash		8M
 
 5. pixis_reset command
 --------------------