X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=doc%2FREADME.nand-boot-ppc440;h=1e9c102644b2a671bf6be70e5d13b5d6e80909ae;hb=ad9f072c2e3b6b4b198f171cb1ba6c0e7fc3e06e;hp=a82a10ee6a5cc5c086bde05e6bb935bf929f8a95;hpb=98e43917dc89631c46d0b8eb481345041912ebee;p=karo-tx-uboot.git

diff --git a/doc/README.nand-boot-ppc440 b/doc/README.nand-boot-ppc440
index a82a10ee6a..1e9c102644 100644
--- a/doc/README.nand-boot-ppc440
+++ b/doc/README.nand-boot-ppc440
@@ -9,7 +9,7 @@ The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH,
 completely without NOR FLASH. This can be done by using the NAND
 boot feature of the 440 NAND flash controller (NDFC).
 
-Here a short desciption of the different boot stages:
+Here a short description of the different boot stages:
 
 a) IPL (Initial Program Loader, integrated inside CPU)
 ------------------------------------------------------
@@ -33,4 +33,28 @@ is set up. While still running from cache, I experienced problems accessing
 the NAND controller.
 
 
+Example: Build and install NAND boot image for Sequoia (440EPx):
+
+a) Configure for sequoia with NAND boot support:
+# make sequoia_nand_config
+
+b) Build image(s)
+# make
+
+This will generate the SPL image in the "nand_spl" directory:
+nand_spl/u-boot-spl.bin
+Also another image is created spanning a whole NAND block (16kBytes):
+nand_spl/u-boot-spl-16k.bin
+The main NAND U-Boot image is generated in the toplevel directory:
+u-boot.bin
+A combined image of u-boot-spl-16k.bin and u-boot.bin is also created:
+u-boot-nand.bin
+
+This image should be programmed at offset 0 in the NAND flash:
+
+# tftp 100000 /tftpboot/sequoia/u-boot-nand.bin
+# nand erase 0 60000
+# nand write 100000 0 60000
+
+
 September 07 2006, Stefan Roese <sr@denx.de>