X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Fahci.h;h=d9563f48a13e3385ae757c119b49d6ecc58ab4a8;hb=cf62ac2ecc78bb72d7692c4cc38387f535cf1205;hp=b363ee1969fa822bbad4c6536558d94c0854f285;hpb=eddc7c46c6030d6eca29ac254c9db98198be572d;p=karo-tx-uboot.git

diff --git a/include/ahci.h b/include/ahci.h
index b363ee1969..d9563f48a1 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -1,5 +1,8 @@
 /*
- * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+ * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
+ * Terry Lv <r65388@freescale.com>
+ *
+ * Copyright (C) Freescale Semiconductor, Inc. 2006.
  * Author: Jason Jin<Jason.jin@freescale.com>
  *         Zhang Wei<wei.zhang@freescale.com>
  *
@@ -25,15 +28,19 @@
 #ifndef _AHCI_H_
 #define _AHCI_H_
 
+#include <pci.h>
+
 #define AHCI_PCI_BAR		0x24
 #define AHCI_MAX_SG		56 /* hardware max is 64K */
+#define AHCI_MAX_CMD_SLOT	32
 #define AHCI_CMD_SLOT_SZ	32
+#define AHCI_MAX_CMD_SLOT	32
 #define AHCI_RX_FIS_SZ		256
 #define AHCI_CMD_TBL_HDR	0x80
 #define AHCI_CMD_TBL_CDB	0x40
-#define AHCI_CMD_TBL_SZ		AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16)
-#define AHCI_PORT_PRIV_DMA_SZ	AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ	\
-				+ AHCI_RX_FIS_SZ
+#define AHCI_CMD_TBL_SZ		(AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16))
+#define AHCI_PORT_PRIV_DMA_SZ	(AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT + \
+				AHCI_CMD_TBL_SZ	+ AHCI_RX_FIS_SZ)
 #define AHCI_CMD_ATAPI		(1 << 5)
 #define AHCI_CMD_WRITE		(1 << 6)
 #define AHCI_CMD_PREFETCH	(1 << 7)
@@ -179,7 +186,7 @@ struct ahci_probe_ent {
 	u32	host_flags;
 	u32	host_set_flags;
 	u32	mmio_base;
-	u32     pio_mask;
+	u32	pio_mask;
 	u32	udma_mask;
 	u32	flags;
 	u32	cap;	/* cache of HOST_CAP register */
@@ -187,4 +194,6 @@ struct ahci_probe_ent {
 	u32	link_port_map; /*linkup port map*/
 };
 
+int ahci_init(u32 base);
+
 #endif