X-Git-Url: https://git.kernelconcepts.de/?a=blobdiff_plain;f=include%2Fconfigs%2Fxaeniax.h;h=eee2547a374265b208f6a0faf949453056256be1;hb=612404c28a64a6df300642a1550a65dcc8e01f82;hp=324f03e24c51a4bf4d587cfcbe91b0924e431ad2;hpb=6d0f6bcf337c5261c08fabe12982178c2c489d76;p=karo-tx-uboot.git

diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index 324f03e24c..eee2547a37 100644
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -40,20 +40,21 @@
  * High Level Configuration Options
  * (easy to change)
  */
-#define CONFIG_PXA250		1	/* This is an PXA255 CPU    */
+#define CONFIG_CPU_PXA25X		1	/* This is an PXA255 CPU    */
 #define CONFIG_XAENIAX		1	/* on a xaeniax board	    */
+#define	CONFIG_SYS_TEXT_BASE	0x0
 
+#define CONFIG_BOARD_LATE_INIT
 
-#define BOARD_LATE_INIT		1
-
-
-#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * select serial console configuration
  */
+#define CONFIG_PXA_SERIAL
 #define CONFIG_BTUART	       1       /* we use BTUART on XAENIAX */
-
+#define CONFIG_CONS_INDEX	4
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
@@ -62,9 +63,6 @@
 
 #define CONFIG_BAUDRATE		115200
 
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 } /* valid baudrates */
-
-
 /*
  * BOOTP options
  */
@@ -110,7 +108,6 @@
  * used for the RAM copy of the uboot code
  */
 #define CONFIG_SYS_MALLOC_LEN	    (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 
 /*
  * Miscellaneous configurable options
@@ -118,7 +115,6 @@
 #define CONFIG_SYS_LONGHELP				/* undef to save memory	*/
 #define CONFIG_SYS_HUSH_PARSER		1
 
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 
 #ifdef CONFIG_SYS_HUSH_PARSER
 #define CONFIG_SYS_PROMPT		"u-boot$ "	/* Monitor Command Prompt */
@@ -134,11 +130,9 @@
 #define CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on	*/
 #define CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM	*/
 
-#undef	CONFIG_SYS_CLKS_IN_HZ				/* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR		0xa1000000	/* default load address */
 
-#define CONFIG_SYS_HZ			3686400		/* incrementer freq: 3.6864 MHz */
+#define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_CPUSPEED		0x141		/* set core clock to 400/200/100 MHz */
 
 /*
@@ -165,6 +159,9 @@
 
 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		0xfffff800
+
 /*
  * FLASH and environment organization
  */
@@ -180,21 +177,10 @@
 #define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + 0x40000)/* Addr of Environment Sector	*/
 #define CONFIG_ENV_SIZE		0x40000			/* Total Size of Environment Sector	*/
 
-/*
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
-#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
-#endif
-
 /*
  * SMSC91C111 Network Card
  */
-#define CONFIG_DRIVER_SMC91111		1
+#define CONFIG_SMC91111		1
 #define CONFIG_SMC91111_BASE		0x10000300  /* chip select 3         */
 #define CONFIG_SMC_USE_32_BIT		1          /* 32 bit bus  */
 #undef  CONFIG_SMC_91111_EXT_PHY		   /* we use internal phy   */
@@ -431,8 +417,9 @@
  */
 #define CONFIG_SYS_PSSR_VAL		0x00000030
 
-#define CONFIG_SYS_CKEN_VAL            0x00000080  /*  */
-#define CONFIG_SYS_ICMR_VAL            0x00000000  /* No interrupts enabled        */
+#define CONFIG_SYS_CKEN			0x00000080  /*  */
+#define CONFIG_SYS_ICMR			0x00000000  /* No interrupts enabled        */
+#define	CONFIG_SYS_CCCR			CCCR_L27|CCCR_M2|CCCR_N10
 
 
 /*
@@ -556,6 +543,9 @@
  */
 #define CONFIG_SYS_MDMRS_VAL		0x00320032
 
+#define	CONFIG_SYS_FLYCNFG_VAL		0x00000000
+#define	CONFIG_SYS_SXCNFG_VAL		0x00000000
+
 /*
  * PCMCIA and CF Interfaces
  */